aboutsummaryrefslogtreecommitdiff
path: root/lib/CodeGen
AgeCommit message (Collapse)Author
2012-06-01Add support for enum forward declarations.Eric Christopher
Part of rdar://11570854 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157786 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-31X86: replace SUB with CMP if possibleManman Ren
This patch will optimize the following movq %rdi, %rax subq %rsi, %rax cmovsq %rsi, %rdi movq %rdi, %rax to cmpq %rsi, %rdi cmovsq %rsi, %rdi movq %rdi, %rax Perform this optimization if the actual result of SUB is not used. rdar: 11540023 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157755 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-30Prioritize smaller register classes for urgent evictions.Jakob Stoklund Olesen
It helps compile exotic inline asm. In the test case, normal GR32 virtual registers use up eax-edx so the final GR32_ABCD live range has no registers left. Since all the live ranges were tiny, we had no way of prioritizing the smaller register class. This patch allows tiny unspillable live ranges to be evicted by tiny unspillable live ranges from a smaller register class. <rdar://problem/11542429> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157715 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-30Switch the canonical FMA term operand order to match both the comment I ↵Owen Anderson
wrote and the usual LLVM convention. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157708 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-30Teach DAGCombine to canonicalize the position of a constant in the term ↵Owen Anderson
operands of an FMA node. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157707 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-30Remove extra space.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157706 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-30Remove some redundant tests.Jakob Stoklund Olesen
An empty list is not represented as a null pointer. Let TRI do its own shortcuts. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157702 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-30Teach taildup to update livein set. rdar://11538365Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157663 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-30If-converter models predicated defs as read + write. The read should be ↵Evan Cheng
marked as 'undef' since it may not already be live. This appeases -verify-machineinstrs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157662 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-30Add an insertPass API to TargetPassConfig. <rdar://problem/11498613>Bob Wilson
Besides adding the new insertPass function, this patch uses it to enhance the existing -print-machineinstrs so that the MachineInstrs after a specific pass can be printed. Patch by Bin Zeng! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157655 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-29Optional def can be either a def or a use (of reg0).Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157640 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-29Clear the entering, exiting and internal ranges of a bundle before collectingLang Hames
ranges for the instruction about to be bundled. This fixes a bug in an external project where an assertion was triggered due to spurious 'multiple defs' within the bundle. Patch by Ivan Llopard. Thanks Ivan! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157632 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-29ConstantRangesSet renamed to IntegersSubset. CRSBuilder renamed to ↵Stepan Dyatkovskiy
IntegersSubsetMapping. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157612 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-28Add llvm.fabs intrinsic.Peter Collingbourne
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157594 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-28PR1255: Case RangesStepan Dyatkovskiy
Implemented IntItem - the wrapper around APInt. Why not to use APInt item directly right now? 1. It will very difficult to implement case ranges as series of small patches. We got several large and heavy patches. Each patch will about 90-120 kb. If you replace ConstantInt with APInt in SwitchInst you will need to changes at the same time all Readers,Writers and absolutely all passes that uses SwitchInst. 2. We can implement APInt pool inside and save memory space. E.g. we use several switches that works with 256 bit items (switch on signatures, or strings). We can avoid value duplicates in this case. 3. IntItem can be easyly easily replaced with APInt. 4. Currenly we can interpret IntItem both as ConstantInt and as APInt. It allows to provide SwitchInst methods that works with ConstantInt for non-updated passes. Why I need it right now? Currently I need to update SimplifyCFG pass (EqualityComparisons). I need to work with APInts directly a lot, so peaces of code ConstantInt *V = ...; if (V->getValue().ugt(AnotherV->getValue()) { ... } will look awful. Much more better this way: IntItem V = ConstantIntVal->getValue(); if (AnotherV < V) { } Of course any reviews are welcome. P.S.: I'm also going to rename ConstantRangesSet to IntegersSubset, and CRSBuilder to IntegersSubsetMapping (allows to map individual subsets of integers to the BasicBlocks). Since in future these classes will founded on APInt, it will possible to use them in more generic ways. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157576 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-27Have getOrCreateSubprogramDIE store the DIE for a subprogramPeter Collingbourne
definition in the map before calling itself to retrieve the DIE for the declaration. Without this change, if this causes getOrCreateSubprogramDIE to be recursively called on the definition, it will create multiple DIEs for that definition. Fixes PR12831. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157541 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-27Missed parens.Benjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157527 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-27r157525 didn't work, just disable iterator checking.Benjamin Kramer
This is obviosly right but I don't see how to do this with proper vector iterators without building a horrible mess of workarounds. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157526 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-27SDAGBuilder: Avoid iterator invalidation harder.Benjamin Kramer
vector.begin()-1 is invalid too. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157525 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-26SDAGBuilder: Don't create an invalid iterator when there is only one switch ↵Benjamin Kramer
case. Found by libstdc++'s debug mode. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157522 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-26SelectionDAGBuilder: When emitting small compare chains for switches order ↵Benjamin Kramer
them by using edge weights. SimplifyCFG tends to form a lot of 2-3 case switches when merging branches. Move the most likely condition to the front so it is checked first and the others can be skipped. This is currently not as effective as it could be because SimplifyCFG destroys profiling metadata when merging branches and switches. Merging branch weight metadata is tricky though. This code touches at most 3 cases so I didn't use a proper sorting algorithm. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157521 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-26ScoreboardHazardRecognizer: Remove dead conditional in debug code.Benjamin Kramer
Negative cycles are filtered out earlier. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157514 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-25Change interface for TargetLowering::LowerCallTo and TargetLowering::LowerCallJustin Holewinski
to pass around a struct instead of a large set of individual values. This cleans up the interface and allows more information to be added to the struct for future targets without requiring changes to each and every target. NV_CONTRIB git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157479 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-25misched: trace formattingAndrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157455 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-25Simplify code for calling a function where CanLowerReturn fails, fixing a ↵Eli Friedman
small bug in the process. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157446 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-24Silence unused variable warnings from when assertions are disabled.Kaelyn Uhrain
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157438 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-24misched: Use the same scheduling heuristics with -misched-topdown/bottomup.Andrew Trick
(except the part about choosing direction) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157437 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-24misched: Trace regpressure.Andrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157429 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-24misched: Give each ReadyQ a unique IDAndrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157428 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-24misched: Added ScoreboardHazardRecognizer.Andrew Trick
The Hazard checker implements in-order contraints, or interlocked resources. Ready instructions with hazards do not enter the available queue and are not visible to other heuristics. The major code change is the addition of SchedBoundary to encapsulate the state at the top or bottom of the schedule, including both a pending and available queue. The scheduler now counts cycles in sync with the hazard checker. These are minimum cycle counts based on known hazards. Targets with no itinerary (x86_64) currently remain at cycle 0. To fix this, we need to provide some maximum issue width for all targets. We also need to add the concept of expected latency vs. minimum latency. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157427 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-24misched: Release bottom roots in reverse order.Andrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157426 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-24misched: rename ReadyQ classAndrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157425 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-24misched: copy comments so compareRPDelta is readable by itself.Andrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157424 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-24regpressure: Added RegisterPressure::dumpAndrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157423 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-24regpressure: physreg livein/out fixAndrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157422 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-24Mark some static arrays as const.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157377 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-23Add a last resort tryInstructionSplit() to RAGreedy.Jakob Stoklund Olesen
Live ranges with a constrained register class may benefit from splitting around individual uses. It allows the remaining live range to use a larger register class where it may allocate. This is like spilling to a different register class. This is only attempted on constrained register classes. <rdar://problem/11438902> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157354 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-23Forgot to reverse conditional.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157349 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-23Reduce indentation by early detection of 'continue'. No functionality change.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157348 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-23Correctly deal with identity copies in RegisterCoalescer.Jakob Stoklund Olesen
Now that the coalescer keeps live intervals and machine code in sync at all times, it needs to deal with identity copies differently. When merging two virtual registers, all identity copies are removed right away. This means that other identity copies must come from somewhere else, and they are going to have a value number. Deal with such copies by merging the value numbers before erasing the copy instruction. Otherwise, we leave dangling value numbers in the live interval. This fixes PR12927. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157340 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-23Small fix for the debug output from PBQP (PR12822).Patrik Hägglund
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157319 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-23Add support for C++11 enum classes in llvm.Eric Christopher
Part of rdar://11496790 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157303 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-22Untabify and 80-col.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157274 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-22Formatting consistency.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157273 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-22Only erase virtregs with no uses left.Jakob Stoklund Olesen
Also make sure registers aren't erased twice if the dead def mentions the register twice. This fixes PR12911. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157254 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-21Fix use of an unitialized value in the LegalizeOps expansion for ISD::SUB. ↵Owen Anderson
No in-tree targets exercise this path. Patch by Micah Villmow. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157215 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-21Typo.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157195 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-21Give a small negative bias to giant edge bundles.Jakob Stoklund Olesen
This helps compile time when the greedy register allocator splits live ranges in giant functions. Without the bias, we would try to grow regions through the giant edge bundles, usually to find out that the region became too big and expensive. If a live range has many uses in blocks near the giant bundle, the small negative bias doesn't make a big difference, and we still consider regions including the giant edge bundle. Giant edge bundles are usually connected to landing pads or indirect branches. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157174 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-20Clear kill flags on the fly when joining intervals.Jakob Stoklund Olesen
With physreg joining out of the way, it is easy to recognize the instructions that need their kill flags cleared while testing for interference. This allows us to skip the final scan of all instructions for an 11% speedup of the coalescer pass. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157169 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-20Constrain regclasses in PeepholeOptimizer.Jakob Stoklund Olesen
It can be necessary to restrict to a sub-class before accessing sub-registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157164 91177308-0d34-0410-b5e6-96231b3b80d8
generated by cgit v1.2.3-18-g5258 (git 2.32.0) at 2025-07-05 05:44:59 +0000