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2012-07-02All glory to address sanitizer. ;]Chandler Carruth
It appears to have caught a use-after-free introduced as by r159567 and/or friends which call 'addPass' from many more places. The bug in 'addPass' doesn't appear to be new, and was spotted by inspection when ASan shown a bright light of a stacktrace at these functions. Hopefully this will fix the ASan failure -- I have no test case other than running an ASan-built clang over the test suite. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159614 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-02Target option DisableJumpTables is a gross hack. Move it to TargetLowering ↵Evan Cheng
instead. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159611 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-02misched: allow NULL InstrItineraries.Andrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159599 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-02Turn an assert into an error to make it a bit more friendly.Eric Christopher
Part of rdar://6880388 and rdar://11766377 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159590 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-02Extend TargetPassConfig to allow running only a subset of the normal passes.Bob Wilson
This is still a work in progress but I believe it is currently good enough to fix PR13122 "Need unit test driver for codegen IR passes". For example, you can run llc with -stop-after=loop-reduce to have it dump out the IR after running LSR. Serializing machine-level IR is not yet supported but we have some patches in progress for that. The plan is to serialize the IR to a YAML file, containing separate sections for the LLVM IR, machine-level IR, and whatever other info is needed. Chad suggested that we stash the stop-after pass in the YAML file and use that instead of the start-after option to figure out where to restart the compilation. I think that's a great idea, but since it's not implemented yet I put the -start-after option into this patch for testing purposes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159570 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-02Move assertion with TargetPassConfig's Initialized flag.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159569 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-02Consistently use AnalysisID types in TargetPassConfig.Bob Wilson
This makes it possible to just use a zero value to represent "no pass", so the phony NoPassID global variable is no longer needed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159568 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-02Add all codegen passes to the PassManager via TargetPassConfig.Bob Wilson
This is a preliminary step toward having TargetPassConfig be able to start and stop the compilation at specified passes for unit testing and debugging. No functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159567 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-02Added assertion in getVRegDef of MachineRegisterInfo to make sure the virtualManman Ren
register does not have multiple definitions. Modified TwoAddressInstructionPass to use getUniqueVRegDef instead of getVRegDef. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159545 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-02Reapply "Make NumMicroOps a variable in the subtarget's instruction itinerary."Andrew Trick
Reapplies r159406 with minor cleanup. The regressions appear to have been spurious. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159541 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-02IntRange:Stepan Dyatkovskiy
- Changed isSingleNumber method behaviour. Now this flag is calculated on demand. IntegersSubsetMapping - Optimized diff operation. - Replaced type of Items field from std::list with std::map. - Added new methods: bool isOverlapped(self &RHS) void add(self& RHS, SuccessorClass *S) void detachCase(self& NewMapping, SuccessorClass *Succ) void removeCase(SuccessorClass *Succ) SuccessorClass *findSuccessor(const IntTy& Val) const IntTy* getCaseSingleNumber(SuccessorClass *Succ) IntegersSubsetTest - DiffTest: Added checks for successors. SimplifyCFG Updated SwitchInst usage (now it is case-ragnes compatible) for - SimplifyEqualityComparisonWithOnlyPredecessor - FoldValueComparisonIntoPredecessors git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159527 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-01Now that RegistersDefinedFromSameValue handles one instruction being anRafael Espindola
implicit_def, the other instruction can be anything, including instructions that define multiple values. Be careful about that and don't assume what operand 0 is. Fixes pr13249. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159509 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-30Handle implicit_defs in the register coalescer. I am still trying to produceRafael Espindola
a reduced testcase, but this fixes pr13209. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159479 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-29Add SrcReg2 to analyzeCompare and optimizeCompareInstr to handle CompareManman Ren
instructions with two register operands. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159465 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-29Clear kill flags in InstrEmitter::EmitSubregNode().Jakob Stoklund Olesen
When a local virtual register is made global, make sure to clear any existing kill flags. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159461 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-29Check for extra kill flags on live-out virtual registers.Jakob Stoklund Olesen
This would previously get reported as the misleading "Virtual register def doesn't dominate all uses." git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159460 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-29Add getUniqueVRegDef to MachineRegisterInfo.Manman Ren
This comes in handy during peephole optimization. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159453 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-29Cleanup in DwarfDebug - fix a typo and remove two unused functionsAlexey Samsonov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159433 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-29Move llvm/Support/IRBuilder.h -> llvm/IRBuilder.hChandler Carruth
This was always part of the VMCore library out of necessity -- it deals entirely in the IR. The .cpp file in fact was already part of the VMCore library. This is just a mechanical move. I've tried to go through and re-apply the coding standard's preferred header sort, but at 40-ish files, I may have gotten some wrong. Please let me know if so. I'll be committing the corresponding updates to Clang and Polly, and Duncan has DragonEgg. Thanks to Bill and Eric for giving the green light for this bit of cleanup. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159421 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-29The DIBuilder class is just a wrapper around debug info creationBill Wendling
(a.k.a. MDNodes). The module doesn't belong in Analysis. Move it to the VMCore instead. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159414 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-29Revert "Make NumMicroOps a variable in the subtarget's instruction itinerary."Andrew Trick
This reverts commit r159406. I noticed a performance regression so I'll back out for now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159411 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-29misched: avoid scheduling instructions that can't be dispatched.Andrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159408 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-29misched: count micro-ops toward the issue limit.Andrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159407 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-29Make NumMicroOps a variable in the subtarget's instruction itinerary.Andrew Trick
The TargetInstrInfo::getNumMicroOps API does not change, but soon it will be used by MachineScheduler. Now each subtarget can specify the number of micro-ops per itinerary class. For ARM, this is currently always dynamic (-1), because it is used for load/store multiple which depends on the number of register operands. Zero is now a valid number of micro-ops. This can be used for nop pseudo-instructions or instructions that the hardware can squash during dispatch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159406 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-28add a new @llvm.donothing intrinsic that, well, does nothing, and teach ↵Nuno Lopes
CodeGen to ignore calls to it git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159383 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-28'Promote' vector [su]int_to_fp should widen elements.Jim Grosbach
Teach vector legalization how to honor Promote for int to float conversions. The code checking whether to promote the operation knew to look at the operand, but the actual promotion code didn't. This fixes that. The operand is promoted up via [zs]ext. rdar://11762659 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159378 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-28Move lib/Analysis/DebugInfo.cpp to lib/VMCore/DebugInfo.cpp andBill Wendling
include/llvm/Analysis/DebugInfo.h to include/llvm/DebugInfo.h. The reasoning is because the DebugInfo module is simply an interface to the debug info MDNodes and has nothing to do with analysis. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159312 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-26Allow targets to inject passes before the virtual register rewriter.Jakob Stoklund Olesen
Such passes can be used to tweak the register assignments in a target-dependent way, for example to avoid write-after-write dependencies. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159209 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-26Update a bunch of stale comments that dated from when this folled theChandler Carruth
very first (and worst) placement algorithm. These should now more accurately reflect the reality of the pass. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159185 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-26Enable the new LoopInfo algorithm by default.Andrew Trick
The primary advantage is that loop optimizations will be applied in a stable order. This helps debugging and unit test creation. It is also a better overall implementation without pathologically bad performance on deep functions. On large functions (llvm-stress --size=200000 | opt -loops) Before: 0.1263s After: 0.0225s On deep functions (after tweaking llvm-stress, thanks Nadav): Before: 0.2281s After: 0.0227s See r158790 for more comments. The loop tree is now consistently generated in forward order, but loop passes are applied in reverse order over the program. If we have a loop optimization that prefers forward order, that can easily be achieved by adding a different type of LoopPassManager. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159183 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-26Make sure type is not extended or untyped before create a constant of the ↵Evan Cheng
type. No test case. Found by inspection. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159179 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-25Enforce stricter liveness rules for PHIs.Jakob Stoklund Olesen
Verify that all paths from the entry block to a virtual register read pass through a def. Enable this check even when MRI->isSSA() is false. Verify that the live range of a virtual register is live out of all predecessor blocks, even for PHI-values. This requires that PHIElimination sometimes inserts IMPLICIT_DEF instruction in predecessor blocks. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159150 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-25Run ProcessImplicitDefs on SSA form where it can be much simpler.Jakob Stoklund Olesen
Implicitly defined virtual registers can simply have the <undef> bit set on all uses, and copies can be turned into implicit defs recursively. Physical registers are a bit trickier. We handle the common case where a physreg def is used by a nearby instruction in the same basic block. For more complicated cases, just leave the IMPLICIT_DEF instruction in. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159149 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-25Teach PHIElimination to handle <undef> operands.Jakob Stoklund Olesen
When a PHI use is <undef>, don't emit a copy in the predecessor block, but insert an IMPLICIT_DEF instruction instead. This ensures that virtual register uses are always jointly dominated by defs, even if some of them are IMPLICIT_DEF. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159121 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-25Handle <undef> operands in TwoAddressInstructionPass.Jakob Stoklund Olesen
When the source register to a 2-addr instruction is undefined, there is no need to attempt any transformations - simply replace the source register with the destination register. This also comes up when lowering IMPLICIT_DEF instructions - make sure the <undef> flag is moved to the new partial register def operand: %vreg8<def> = INSERT_SUBREG %vreg9<undef>, %vreg0<kill>, sub_16bit rewrite undef: %vreg8<def> = INSERT_SUBREG %vreg8<undef>, %vreg0<kill>, sub_16bit convert to: %vreg8:sub_16bit<def,read-undef> = COPY %vreg0<kill> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159120 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-24llvm/lib: [CMake] Add explicit dependency to intrinsics_gen.NAKAMURA Takumi
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159112 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-24DAG legalisation can now handle illegal fma vector types by scalarisationPete Cooper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159092 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-23Teach LiveVariables to handle <undef> operands.Jakob Stoklund Olesen
It's simple: Don't treat <undef> operands as uses, and don't assume a virtual register has a defining instruction unless a real use has been seen. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159061 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-22Remove ProcessImplicitDefs.h which was unused.Jakob Stoklund Olesen
The ProcessImplicitDefs class can be local to its implementation file. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159041 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-22Also verify the def index for early clobbers.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159039 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-22Delete a boring statistic.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159030 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-22Store live intervals in an IndexedMap.Jakob Stoklund Olesen
It is both smaller and faster than DenseMap. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159029 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-22Revert r158679 - use case is unclear (and it increases the memory footprint).Hal Finkel
Original commit message: Allow up to 64 functional units per processor itinerary. This patch changes the type used to hold the FU bitset from unsigned to uint64_t. This will be needed for some upcoming PowerPC itineraries. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159027 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-22Fix a crash in --debug code.Jakob Stoklund Olesen
Don't try to print out the live range of a physreg. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159021 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-22Don't depend on live ranges being present.Jakob Stoklund Olesen
DBG_VALUE instructions could be referring to non-existing virtual registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159020 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-22Simplify handleMove() a bit.Jakob Stoklund Olesen
There is no need to check for physreg live ranges. They don't exist any more. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159019 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-22Stop computing physreg live ranges.Jakob Stoklund Olesen
Everyone is using on-demand regunit ranges now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159018 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-22Remove some redundant LIS->hasInterval() checks.Jakob Stoklund Olesen
These functions only operate on virtual registers now, and they all have live ranges. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159015 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-22Use MRI::isConstantPhysReg() to check remat feasibility.Jakob Stoklund Olesen
Don't depend on LiveIntervals::hasInterval() to determine if a physreg is reserved and constant. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159013 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-22Use regunit liveness to guide LiveDebugVariables.Jakob Stoklund Olesen
This should produce the same results as using physreg liveness directly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159009 91177308-0d34-0410-b5e6-96231b3b80d8
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