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code. Avoid change use of PHI instructions because it's not legal to insert any instructions before them.
This fixes PR6027.
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different BlockAddress labels, but nothing semantically important.
Add a FIXME that BlockAddress codegen is broken if the LLVM BB has
an empty name (e.g. strip was run).
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Among other things, this would do very weird things if the
basic block name had (e.g.) a space in it on darwin:
makeNameProper would add quotes, then the mcsymbol would
escape the quotes.
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instead of returning it in an std::string. Based on this change:
1. Change TargetLoweringObjectFileCOFF::getCOFFSection to take a StringRef
2. Change a bunch of targets to call makeNameProper with a smallstring,
making several of them *much* more efficient.
3. Rewrite Mangler::makeNameProper to not build names and then prepend
prefixes, not use temporary std::strings, and to avoid other crimes.
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integers on 64-bit systems.
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where the pre-extension values are available in the subreg of the result of the extension, replace the uses of the pre-extension value with the result + extract_subreg.
For now, this pass is fairly conservative. It only perform the replacement when both the pre- and post- extension values are used in the block. It will miss cases where the post-extension values are live, but not used.
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dumper doesn't really do what I want yet, but
at least it doesn't crash now.
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BRCOND was constant folded.
This fixes PR5980.
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then a load if the
loads are not in the default address space because the transformation discards src value info.
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really does need to be a vector type, because
TargetLowering::getOperationAction for SIGN_EXTEND_INREG uses that type,
and it needs to be able to distinguish between vectors and scalars.
Also, fix some more issues with legalization of vector casts.
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ISD::DELETED_NODE is not safe. Use a DAGUpdateListener to remove dead nodes from work list instead.
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replaced. Do not delete dead nodes again.
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When folding a and(any_ext(load)) both the any_ext and the
load have to have only a single use.
This removes the anyext-uses.ll testcase which started failing
because it is unreduced and unclear what it is testing.
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time, no functionality change.
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Some instructions refer to unique labels, and so cannot be trivially cloned
with CloneMachineInstr.
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multiple register definitions.
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(OP (trunc x), (trunc y)) -> (trunc (OP x, y))
Unfortunately this simple change causes dag combine to infinite looping. The problem is the shrink demanded ops optimization tend to canonicalize expressions in the opposite manner. That is badness. This patch disable those optimizations in dag combine but instead it is done as a late pass in sdisel.
This also exposes some deficiencies in dag combine and x86 setcc / brcond lowering. Teach them to look pass ISD::TRUNCATE in various places.
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defs and kills.
An instruction like this:
%reg1097:1<def> = VMOVSR %R3<kill>, 14, %reg0
Must be replaced with this when substituting physical registers:
%S0<def> = VMOVSR %R3<kill>, 14, %reg0, %D0<imp-def>
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order.
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bottom-up scheduler. We prefer the lower order number.
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result in illegal types for the SHL operator.
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uses several kinds of opcode values which are not declared within
that enum. This fixes PR5946.
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A phi operand that is implicitly defined in a predecessor becomes an undefined
register after phi elimination. This causes a lot of false positives when the
verifier is checking if live-in registers are live-out from all predecessors.
Removing the verifier checks seems like a better solution than insisting on
IMPLICIT_DEF instructions in predecessor blocks.
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instruction.
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dereference the type pointer.
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Intrinsic::dbg_stoppoint
Intrinsic::dbg_region_start
Intrinsic::dbg_region_end
Intrinsic::dbg_func_start
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