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2011-07-09Change createAsmParser to take a MCSubtargetInfo instead of triple,Evan Cheng
CPU, and feature string. Parsing some asm directives can change subtarget state (e.g. .code 16) and it must be reflected in other modules (e.g. MCCodeEmitter). That is, the MCSubtargetInfo instance must be shared. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134795 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-09Oops, didn't mean to commit that.Jakob Stoklund Olesen
Spills should be hoisted out of loops, but we don't want to hoist them to dominating blocks at the same loop depth. That could cause the spills to be executed more often. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134782 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-09Hoist spills within a basic block.Jakob Stoklund Olesen
Try to move spills as early as possible in their basic block. This can help eliminate interferences by shortening the live range being spilled. This fixes PR10221. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134776 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-08Add an intrinsic and codegen support for fused multiply-accumulate. The intentCameron Zwarich
is to use this for architectures that have a native FMA instruction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134742 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-08Be more aggressive about following hints.Jakob Stoklund Olesen
RAGreedy::tryAssign will now evict interference from the preferred register even when another register is free. To support this, add the EvictionCost struct that counts how many hints are broken by an eviction. We don't want to break one hint just to satisfy another. Rename canEvict to shouldEvict, and add the first bit of eviction policy that doesn't depend on spill weights: Always make room in the preferred register as long as the evictees can be split and aren't already assigned to their preferred register. Also make the CSR avoidance more accurate. When looking for a cheaper register it is OK to use a new volatile register. Only CSR aliases that have never been used before should be avoided. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134735 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-08Refactor.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134703 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-08Make provision to have floating point constants in .debug_loc expressions.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134702 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-08Apparently we can't expect a BinaryOperator here.Benjamin Kramer
Should fix llvm-gcc selfhost. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134699 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-08Emit a more efficient magic number multiplication for exact sdivs.Benjamin Kramer
We have to do this in DAGBuilder instead of DAGCombiner, because the exact bit is lost after building. struct foo { char x[24]; }; long bar(struct foo *a, struct foo *b) { return a-b; } is now compiled into movl 4(%esp), %eax subl 8(%esp), %eax sarl $3, %eax imull $-1431655765, %eax, %eax instead of movl 4(%esp), %eax subl 8(%esp), %eax movl $715827883, %ecx imull %ecx movl %edx, %eax shrl $31, %eax sarl $2, %edx addl %eax, %edx movl %edx, %eax git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134695 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-08Eliminate asm parser's dependency on TargetMachine:Evan Cheng
- Each target asm parser now creates its own MCSubtatgetInfo (if needed). - Changed AssemblerPredicate to take subtarget features which tablegen uses to generate asm matcher subtarget feature queries. e.g. "ModeThumb,FeatureThumb2" is translated to "(Bits & ModeThumb) != 0 && (Bits & FeatureThumb2) != 0". git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134678 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-07Remove a FIXME. All of the standard ones are in the list.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134647 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-07Add DEBUG message.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134643 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-07If known DebugLocs do not match then two DBG_VALUE machine instructions are ↵Devang Patel
not identical. For example, DBG_VALUE 3.310000e+02, 0, !"ds"; dbg:sse.stepfft.c:138:18 @[ sse.stepfft.c:32:10 ] DBG_VALUE 3.310000e+02, 0, !"ds"; dbg:sse.stepfft.c:138:18 @[ sse.stepfft.c:31:10 ] These two MIs represent identical value, 3.31..., for one variable, ds, but they are not identical because the represent two separate instances of inlined variable "ds". git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134620 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-07Add functions 'hasPredecessor' and 'hasPredecessorHelper' to SDNode. TheLang Hames
hasPredecessorHelper function allows predecessors to be cached to speed up repeated invocations. This fixes PR10186. X.isPredecessorOf(Y) now just calls Y.hasPredecessor(X) Y.hasPredecessor(X) calls Y.hasPredecessorHelper(X, Visited, Worklist) with empty Visited and Worklist sets (i.e. no caching over invocations). Y.hasPredecessorHelper(X, Visited, Worklist) caches search state in Visited and Worklist to speed up repeated calls. The Visited set is searched for X before going to the worklist to further search the DAG if necessary. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134592 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-07Add DEBUG messages.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134572 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-06When tail-merging multiple blocks, make sure to correctly update the live-in ↵Eli Friedman
list on the merged block to correctly account for the live-outs of all the predecessors. They might not be the same in all cases (the testcase I have involves a PHI node where one of the operands is an IMPLICIT_DEF). Unfortunately, the testcase I have is large and confidential, so I don't have a test to commit at the moment; I'll see if I can come up with something smaller where this issue reproduces. <rdar://problem/9716278> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134565 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-06Remove dead code.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134561 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-06Typo.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134559 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-06Grammar and 80-col.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134555 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-06createMCInstPrinter doesn't need TargetMachine anymore.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134525 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-06Introduce "expect" intrinsic instructions.Jakub Staszak
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134516 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-05Remove the ObjC ARC passes from the default optimization list, and addDan Gohman
extension points to be used by clang. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134444 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-05Break infinite loop when the Hopfield network oscillates.Jakob Stoklund Olesen
This is impossible in theory, I can prove it. In practice, our near-zero threshold can cause the network to oscillate between equally good solutions. <rdar://problem/9720596> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134428 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-05Fix PR10277.Jakob Stoklund Olesen
Remat during spilling triggers dead code elimination. If a phi-def becomes unused, that may also cause live ranges to split into separate connected components. This type of splitting is different from normal live range splitting. In particular, there may not be a common original interval. When the split range is its own original, make sure that the new siblings are also their own originals. The range being split cannot be used as an original since it doesn't cover the new siblings. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134413 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-05Tweak comment and debug output.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134412 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-04Move early tail duplication earlier.Rafael Espindola
This fixes the issue noted in PR10251 where early tail dup of bbs with indirectbr would cause a bb to be duplicated into a loop preheader and then into its predecessors, creating phi nodes with identical operands just before register allocation. This helps with jsinterp.o size (__TEXT goes from 163568 to 126656) and a bit with performance 1.005x faster on sunspider (jits still enabled). The result on webkit with the jit disabled is more significant: 1.021x faster. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134372 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-04Move most of the pre BB code to TailDuplicateAndUpdate. Change theRafael Espindola
HasIndirectbr variable to be just that. No functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134371 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-04Reduce indentation and fix the count of how many PHIs we have inserted.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134370 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-04Fix PR10244.Jakob Stoklund Olesen
A split point inserted in a block with a landing pad successor may be hoisted above the call to ensure that it dominates all successors. The code that handles the rest of the basic block must take this into account. I am not including a test case, it would be very fragile. PR10244 comes from building clang with exceptions enabled. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134369 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-03Fix an easy fixme.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134364 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-02Use getVNInfoAt.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134312 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-02Better diagnostics when inline asm fails to allocate.Jakob Stoklund Olesen
asm.c:2:7: error: ran out of registers during register allocation asm(""::"r"(0), "r"(1), "r"(2), "r"(3), "r"(4), "r"(5), "r"(6), "r"(7), "r"(8), "r"(9)); ^ git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134310 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-02Check the VN of the src register at the two copies, not just theRafael Espindola
register number. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134309 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-02Include a source location when complaining about bad inline assembly.Jakob Stoklund Olesen
Add a MI->emitError() method that the backend can use to report errors related to inline assembly. Call it from X86FloatingPoint.cpp when the constraints are wrong. This enables proper clang diagnostics from the backend: $ clang -c pr30848.c pr30848.c:5:12: error: Inline asm output regs must be last on the x87 stack __asm__ ("" : "=u" (d)); /* { dg-error "output regs" } */ ^ 1 error generated. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134307 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-02Use a new strategy for preventing eviction loops in RAGreedy.Jakob Stoklund Olesen
Every live range is assigned a cascade number the first time it is involved in an eviction. As the evictor, it gets a new cascade number. Every evictee is assigned the same cascade number as the evictor. Eviction is prohibited if the evictor has a lower assigned cascade number than the evictee. This means that assigned cascade numbers are monotonically increasing with every eviction, yet they are bounded by NextCascade which can only be incremented by new live ranges. Thus, infinite loops cannot happen, but eviction cascades can still be triggered by new live ranges as we want. Thanks to Andy for explaining this to me. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134303 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-01Take a stab at fixing the llvm-x86_64-linux-checks failure.Cameron Zwarich
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134287 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-01Rename TargetSubtarget to TargetSubtargetInfo for consistency.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134259 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-01Disable commit 134216 ("Add 134199 back, but disable the optimization when ↵Duncan Sands
the second copy is a kill") to see if it fixes the i386 dragonegg buildbot, which is timing out because gcc built with dragonegg is going into an infinite loop. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134237 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-01Avoid DenseMap lookup.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134231 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-01Fix off by one error. I misunderstood the comment about killedAt.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134229 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-01Check the liveinterval, not the kill flag.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134228 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-01Don't inflate register classes used by inline asm.Jakob Stoklund Olesen
The constraints are represented by the register class of the original virtual register created for the inline asm. If the register class were included in the operand descriptor, we might be able to do this. For now, just give up on regclass inflation when inline asm is involved. No test case, this bug hasn't happened yet. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134226 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-01Add 134199 back, but disable the optimization when the second copy is a kill.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134216 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-30Revert my previous patch while I debug llvm-gcc bootstrap.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134201 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-30Don't give up on coalescing A and B when we findRafael Espindola
A = X B = X Instead, proceed as if we had found A = X B = A git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134199 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-30Create a isFullCopy predicate.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134189 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-30Remove dead code.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134148 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-30Reapply r134047 now that the world is ready for it.Jakob Stoklund Olesen
This patch will sometimes choose live range split points next to interference instead of always splitting next to a register point. That means spill code can now appear almost anywhere, and it was necessary to fix code that didn't expect that. The difficult places were: - Between a CALL returning a value on the x87 stack and the corresponding FpPOP_RETVAL (was FpGET_ST0). Probably also near x87 inline assembly, but that didn't actually show up in testing. - Between a CALL popping arguments off the stack and the corresponding ADJCALLSTACKUP. Both are fixed now. The only place spill code can't appear is after terminators, see SplitAnalysis::getLastSplitPoint. Original commit message: Rewrite RAGreedy::splitAroundRegion, now with cool ASCII art. This function has to deal with a lot of special cases, and the old version got it wrong sometimes. In particular, it would sometimes leave multiple uses in the stack interval in a single block. That causes bad code with multiple reloads in the same basic block. The new version handles block entry and exit in a single pass. It first eliminates all the easy cases, and then goes on to create a local interval for the blocks with difficult interference. Previously, we would only create the local interval for completely isolated blocks. It can happen that the stack interval becomes completely empty because we could allocate a register in all edge bundles, and the new local intervals deal with the interference. The empty stack interval is harmless, but we need to remove a SplitKit assertion that checks for empty intervals. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134125 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-30Remove getRegClassForInlineAsmConstraint and all dependencies.Eric Christopher
Fixes rdar://9643582 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134123 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-29Revert r133953 for now.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134116 91177308-0d34-0410-b5e6-96231b3b80d8
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