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2008-07-18Revert 53729, after waking up in the middle ofDuncan Sands
the night realising that it was wrong :) I think the reason the same type was being used for the shufflevec of indices as for the actual indices is so that if one of them needs splitting then so does the other. After my patch it might be that the indices need splitting but not the rest, yet there is no good way of handling that. I think the right solution is to not have the shufflevec be an operand at all: just have it be the list of numbers it actually is, stored as extra info in the node. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53768 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-18Fix a LocalSpiller leak. This fixes tramp3d-v4.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53766 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-17Re-introduce LeakDetector support for MachineInstrs and MachineBasicBlocks.Dan Gohman
Fix a leak that this turned up in LowerSubregs.cpp. And, comment a leak in LiveIntervalAnalysis.cpp. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53746 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-17When printing MemOperand nodes, only use print() forDan Gohman
PseudoSourceValue values, which never have names. Use getName() for all other values, because we want to print just a short summary of the value, not the entire instruction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53738 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-17Subreg live interval valno may not have a corresponding def machineinstr ↵Evan Cheng
since it's less precise. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53734 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-17Use a legal type for elements of the vector_shuffleDuncan Sands
mask. These are just indices into the shuffled vector so their type is unrelated to the type of the shuffled elements (which is what was being used before). This fixes vec_shuffle-11.ll when using LegalizeTypes. What seems to have happened is that Dan's recent change r53687, which corrected the result type of the shuffle, somehow caused LegalizeTypes to notice that the mask operand was a BUILD_VECTOR with a legal type but elements of an illegal type (i64). LegalizeTypes legalized this by introducing a new BUILD_VECTOR of i32 and bitcasting it to the old type. But the mask operand is not supposed to be a bitcast but a straight BUILD_VECTOR of constants, causing a crash. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53729 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-17Add a new function, ReplaceAllUsesOfValuesWith, which handles bulkDan Gohman
replacement of multiple values. This is slightly more efficient than doing multiple ReplaceAllUsesOfValueWith calls, and theoretically could be optimized even further. However, an important property of this new function is that it handles the case where the source value set and destination value set overlap. This makes it feasible for isel to use SelectNodeTo in many very common cases, which is advantageous because SelectNodeTo avoids a temporary node and it doesn't require CSEMap updates for users of values that don't change position. Revamp MorphNodeTo, which is what does all the work of SelectNodeTo, to handle operand lists more efficiently, and to correctly handle a number of corner cases to which its new wider use exposes it. This commit also includes a change to the encoding of post-isel opcodes in SDNodes; now instead of being sandwiched between the target-independent pre-isel opcodes and the target-dependent pre-isel opcodes, post-isel opcodes are now represented as negative values. This makes it possible to test if an opcode is pre-isel or post-isel without having to know the size of the current target's post-isel instruction set. These changes speed up llc overall by 3% and reduce memory usage by 10% on the InstructionCombining.cpp testcase with -fast and -regalloc=local. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53728 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-17LegalizeTypes support for what seems to be theDuncan Sands
only missing ppc long double operations: FNEG and FP_EXTEND. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53723 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-17Turn LegalizeTypes back off again for the moment:Duncan Sands
it is breaking Darwin bootstrap due to missing functionality. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53721 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-17Factorize some code for determining which libcall to use.Duncan Sands
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53713 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-16Fix the result type of a VECTOR_SHUFFLE+BIT_CONVERT dagcombine. ThisDan Gohman
was turned up by some new SelectionDAG assertion checks that I'm working on. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53687 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-16Add support for promoting and expanding AssertZextDuncan Sands
and AssertSext. Needed when passing huge integer parameters with the zeroext or signext attributes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53684 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-16Fix a comment to say nonnegative instead of positive.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53681 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-16Add an assert to check for empty flags for MachineMemOperand.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53680 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-16Reorder methods alphabetically. No functionality change.Duncan Sands
While this is not a wonderful organizing principle, it does make it easy to find routines, and clear where to insert new ones. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53672 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-16Turn on LegalizeTypes by default.Duncan Sands
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53671 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-15SelectionDAG::AssignNodeIds is unused.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53636 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-15Don't sort SDNodes by their addresses in SelectionDAG::dump. Instead,Dan Gohman
just use the AllNodes order, which is at least relatively stable across runs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53632 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-15LegalizeTypes support for fabs on ppc long double.Duncan Sands
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53613 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-15LegalizeTypes support for promotion of bswap.Duncan Sands
In LegalizeDAG the value is zero-extended to the new type before byte swapping. It doesn't matter how the extension is done since the new bits are shifted off anyway after the swap, so extend by any old rubbish bits. This results in the final assembler for the testcase being one line shorter. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53604 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-15LegalizeTypes support for promotion of SIGN_EXTEND_INREG.Duncan Sands
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53603 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-15Reorder the integer promotion methods alphabetically.Duncan Sands
No change in functionality. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53602 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-15Fixed potential bug if the source and target of a bit convert have different ↵Mon P Wang
alignment git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53590 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-14Reapply 53476 and 53480, with a fix so that it properly updatesDan Gohman
the BB member to the current basic block after emitting instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53567 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-14Improve debug output for MemOperandSDNode. PseudoSourceValue nodesDan Gohman
don't have value names, so use print instead of getName() to get a useful string. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53563 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-14Fix edito in the PseudoSourceValue name list.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53562 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-14I don't think BUILD_PAIR can have a vector result.Duncan Sands
Remove support for this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53559 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-14Tighten up some checks. Fix FPOWI splitting forDuncan Sands
non-power-of-two vectors. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53558 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-14An INSERT_VECTOR_ELT can insert a larger valueDuncan Sands
than the vector element type. Don't forget to handle this when the insertion index is not a constant. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53556 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-14According to the docs, it is possible to have anDuncan Sands
extending load of a vector. Handle this case when splitting vector loads. I'm not completely sure what is supposed to happen, but I think it means hi should be set to undef. LegalizeDAG does not consider this case. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53555 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-14There should be no extending loads or truncatingDuncan Sands
stores of one-element vectors. Also, neaten the handling of INSERT_VECTOR_ELT when the inserted type is larger than the vector element type. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53554 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-14Ignore TargetConstant with an illegal type. TheseDuncan Sands
are used for passing huge immediates in inline ASM from the front-end straight down to the ASM writer. Of course this is a hack, but it is simple, limited in scope, works in practice, and is what LegalizeDAG does. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53553 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-12Typos.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53504 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-12Fix PR2536: a nasty spiller bug. If a two-address instruction uses a ↵Evan Cheng
register but the use portion of its live range is not part of its liveinterval, it must be defined by an implicit_def. In that case, do not spill the use. e.g. 8 %reg1024<def> = IMPLICIT_DEF 12 %reg1024<def> = INSERT_SUBREG %reg1024<kill>, %reg1025, 2 The live range [12, 14) are not part of the r1024 live interval since it's defined by an implicit def. It will not conflicts with live interval of r1025. Now suppose both registers are spilled, you can easily see a situation where both registers are reloaded before the INSERT_SUBREG and both target registers that would overlap. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53503 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-12Back out 53476 and 53480 for now. Somehow they cause llc to miscompile 179.art.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53502 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-11Include a frame index in the "fixed stack" pseudo source valueDan Gohman
instead of using the frame index for the SVOffset, which was inconsistent. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53486 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-11Fix an obsolete top-level comment.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53481 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-11Factor out debugging code into the common base class.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53480 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-11Add support for putting NamedRegionTimers in TimerGroups, andDan Gohman
use a timer group for the timers in SelectionDAGISel. Also, Split scheduling out from emitting, to give each their own timer. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53476 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-11Trim unnecessary #includes.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53471 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-11Remove an apparently useless routine: there shouldDuncan Sands
be no need to split the result of a vector RET node, since they are always already legal. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53462 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-11It is pointless to turn a UINT_TO_FP into anDuncan Sands
SINT_TO_FP libcall plus additional operations: it might as well be a direct UINT_TO_FP libcall. So only turn it into an SINT_TO_FP if the target has special handling for SINT_TO_FP. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53461 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-11Add two missing SINT_TO_FP libcalls.Duncan Sands
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53460 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-11Port a shift-by-1 optimization from LegalizeDAG: itDuncan Sands
was presumably added after the rest of the code was copied to LegalizeTypes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53459 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-11Add support for 128 bit shifts and 32 bit shiftsDuncan Sands
on 16 bit machines. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53458 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-10Fix a bug in the soft-float handling of FCOPYSIGN that Duncan noticedChris Lattner
when working on legalizetypes. Both legalizetypes and legalizeops now produce hte same code for CodeGen/ARM/fcopysign.ll. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53435 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-10make legalize types be a command line option: -enable-legalize-types.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53434 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-10Make stack slot coloring's debug output more consistent withDan Gohman
other passes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53415 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-10Change StackSlotForVirtReg (which maps vregs to frame indices) from std::map ↵Evan Cheng
to IndexedMap. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53414 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-10Add support for 128 bit multiplicative operations.Duncan Sands
Lack of these caused a bootstrap failure with Fortran on x86-64 with LegalizeTypes turned on. While there, be nice to 16 bit machines and support expansion of i32 too. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53408 91177308-0d34-0410-b5e6-96231b3b80d8
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