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2008-09-19Make earlyclobber stuff work when virtual regsDale Johannesen
have previously been assigned conflicting physreg. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56364 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-19Re-materalized definition instructions may be dead. Whack them.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56352 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-19Remove AsmThatEarlyClobber etc. from LiveIntervalAnalysisDale Johannesen
and redo as linked list walk. Logic moved into RA. Per review feedback. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56326 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-18Somehow RegAllocLinearScan is keeping two pointers to MachineRegisterInfo.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56314 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-18Don't consider instructions with implicit physical registerDan Gohman
defs to be necessarily live. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56310 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-18Add a new "fast" scheduler. This is currently basically just aDan Gohman
copy of the BURRList scheduler, but with several parts ripped out, such as backtracking, online topological sort maintenance (needed by backtracking), the priority queue, and Sethi-Ullman number computation and maintenance (needed by the priority queue). As a result of all this, it generates somewhat lower quality code, but that's its tradeoff for running about 30% faster than list-burr in -fast mode in many cases. This is somewhat experimental. Moving forward, major pieces of this can be refactored with pieces in common with ScheduleDAGRRList.cpp. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56307 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-17Add a bit to mark operands of asm's that conflictDale Johannesen
with an earlyclobber operand elsewhere. Propagate this bit and the earlyclobber bit through SDISel. Change linear-scan RA not to allocate regs in a way that conflicts with an earlyclobber. See also comments. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56290 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-17Unallocatable registers do not have live intervals.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56287 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-17Don't worry about clobbering physical register defs that aren't used.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56281 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-17Add a new MachineInstr-level DCE pass. It is very simple, and is intended toDan Gohman
be used with fast-isel. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56268 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-16When converting a CopyFromReg to a copy instruction, use the register class ↵Evan Cheng
of its uses to determine the right destination register class of the copy. This is important for targets where a physical register may belong to multiple register classes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56258 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-16Change SelectionDAG::getConstantPool to always set the alignment of theDan Gohman
ConstantPoolSDNode, using the target's preferred alignment for the constant type. In LegalizeDAG, when performing loads from the constant pool, the ConstantPoolSDNode's alignment is used in the calls to getLoad and getExtLoad. This change prevents SelectionDAG::getLoad/getExtLoad from incorrectly choosing the ABI alignment for constant pool loads when Alignment == 0. The incorrect alignment is only a performance issue when ABI alignment does not equal preferred alignment (i.e., on x86 it was generating MOVUPS instead of MOVAPS for v4f32 constant loads when the default ABI alignment for 128bit vectors is forced to 1 byte.) Patch by Paul Redmond! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56253 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-16Reverting r56249. On further investigation, this functionality isn't needed.Bill Wendling
Apologies for the thrashing. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56251 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-16Include the alignment value when displaying ConstantPoolSDNodes.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56250 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-16- Change "ExternalSymbolSDNode" to "SymbolSDNode".Bill Wendling
- Add linkage to SymbolSDNode (default to external). - Change ISD::ExternalSymbol to ISD::Symbol. - Change ISD::TargetExternalSymbol to ISD::TargetSymbol These changes pave the way to allowing SymbolSDNodes with non-external linkage. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56249 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-16Fix these comments to reflect current reality. Surprisingly,Dan Gohman
MachineConstantPool::getConstantPoolIndex actually expects a log2-encoded alignment. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56248 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-16Don't take the time to CheckDAGForTailCallsAndFixThem when tail callsDan Gohman
are not enabled. Instead just omit the tail call flag when calls are created. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56235 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-15Live intervals for live-in registers should begin at the beginning of a ↵Owen Anderson
basic block, not at the first instruction. Also, their valno's should have an unknown def. This has no effect currently, but was causing issues when StrongPHIElimination was enabled. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56231 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-15Re-enable SelectionDAG CSE for calls. It matters in the case ofDan Gohman
libcalls, as in this testcase on ARM. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56226 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-15Correctly update kill infos after extending a live range and merge 2 val#'s; ↵Evan Cheng
fix 56165 - do not mark val# copy field if the copy does not define the val#. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56199 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-14adjust last patch per review feedbackDale Johannesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56194 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-13Remove isImm(), isReg(), and friends, in favor of Dan Gohman
isImmediate(), isRegister(), and friends, to avoid confusion about having two different names with the same meaning. I'm not attached to the longer names, and would be ok with changing to the shorter names if others prefer it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56189 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-13Define CallSDNode, an SDNode subclass for use with ISD::CALL.Dan Gohman
Currently it just holds the calling convention and flags for isVarArgs and isTailCall. And it has several utility methods, which eliminate magic 5+2*i and similar index computations in several places. CallSDNodes are not CSE'd. Teach UpdateNodeOperands to handle nodes that are not CSE'd gracefully. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56183 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-12On some targets, non-move instructions can become move instructions because ↵Evan Cheng
of coalescing. e.g. vr2 = OR vr0, vr1 => vr2 = OR vr1, vr1 // after coalescing vr0 with vr1 Update the value# of the destination register with the copy instruction if that happens. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56165 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-12Change ConstantSDNode and ConstantFPSDNode to use ConstantInt* andDan Gohman
ConstantFP* instead of APInt and APFloat directly. This reduces the amount of time to create ConstantSDNode and ConstantFPSDNode nodes when ConstantInt* and ConstantFP* respectively are already available, as is the case in SelectionDAGBuild.cpp. Also, it reduces the amount of time to legalize constants into constant pools, and the amount of time to add ConstantFP operands to MachineInstrs, due to eliminating ConstantInt::get and ConstantFP::get calls. It increases the amount of work needed to create new constants in cases where the client doesn't already have a ConstantInt* or ConstantFP*, such as legalize expanding 64-bit integer constants to 32-bit constants. And it adds a layer of indirection for the accessor methods. But these appear to be outweight by the benefits in most cases. It will also make it easier to make ConstantSDNode and ConstantFPNode more consistent with ConstantInt and ConstantFP. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56162 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-12Pass "earlyclobber" bit through to machineDale Johannesen
representation; coalescer and RA need to know about it. No functional change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56161 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-12Rename ConstantSDNode::getValue to getZExtValue, for consistencyDan Gohman
with ConstantInt. This led to fixing a bug in TargetLowering.cpp using getValue instead of getAPIntValue. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56159 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-12The sequence for ppcf128 compares was not IEEEDale Johannesen
safe in the presence of NaNs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56136 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-11Fix PR2748. Avoid coalescing physical register with virtual register which ↵Evan Cheng
would create illegal extract_subreg. e.g. vr1024 = extract_subreg vr1025, 1 ... vr1024 = mov8rr AH If vr1024 is coalesced with AH, the extract_subreg is now illegal since AH does not have a super-reg whose sub-register 1 is AH. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56118 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-11Fix PR2783 - coalescer bug. Missing a TargetRegisterInfo::isVirtualRegister ↵Evan Cheng
check. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56112 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-11Fix a 80 column violation.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56097 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-11Propagate subreg index when promoting a load to a copy.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56085 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-10FastISel support for i1 PHI nodes.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56069 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-10FastISel support for i1 constants.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56068 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-10Fix a bug in the coalescer where it didn't check if a live interval existed ↵Owen Anderson
before trying to manipulate it. This was exposed by fast isel's handling of shifts on X86-64. With this, FreeBench/pcompress2 passes on X86-64 in fast isel. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56067 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-10Add X86FastISel support for static allocas, and refencesDan Gohman
to static allocas. As part of this change, refactor the address mode code for laods and stores. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56066 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-10Fix PR2664 - spiller GetRegForReload wasn't respecting sub-register indices ↵Evan Cheng
on machine operands. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56065 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-10Add a break statement that I accidentally deleted whenDan Gohman
I shuffled the fast-isel command-line options around. This fixes a bunch of fast-isel failures. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56057 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-10Remove unnecessary bit-wise AND from the limited precision work.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56049 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-10Fix 80 col violation.Daniel Dunbar
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56048 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-10Fix typo.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56037 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-10Check that both operands are f32 before attempting to lower.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56036 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-10Implement "visitPow". This is mainly used to see if we have a pow() call of thisBill Wendling
form: powf(10.0f, x); If this is the case, and also we want limited precision floating-point calculations, then lower to do the limited-precision stuff. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56035 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-09A few more places where FPOW is being ignored.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56032 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-09Change -fast-isel-no-abort to -fast-isel-abort, which now defaultsDan Gohman
to being off by default. Also, add assertion checks to check that the various fast-isel-related command-line options are only used when -fast-isel itself is enabled. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56029 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-09Legalizer was missing code that expand fpow to a libcall.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56028 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-09Adding 6-, 12-, and 18-bit limited-precision floating-point support for exp2Bill Wendling
function. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56025 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-09Move the uglier parts of deciding not to emit aDale Johannesen
UsedDirective for some symbols in llvm.used into Darwin-specific code. I've decided LessPrivateGlobal is potentially a useful abstraction and left it in the target-independent area, with improved comment. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56024 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-09Add support for 6-, 12-, and 18-bit limited precision calculations of exp forBill Wendling
floating-point numbers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56023 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-09Add a new option, -fast-isel-verbose, that can be used withDan Gohman
-fast-isel-no-abort to get a dump of all unhandled instructions, without an abort. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56021 91177308-0d34-0410-b5e6-96231b3b80d8
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