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2009-03-13Fix FastISel's assumption that i1 values are always zero-extendedDan Gohman
by inserting explicit zero extensions where necessary. Included is a testcase where SelectionDAG produces a virtual register holding an i1 value which FastISel previously mistakenly assumed to be zero-extended. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66941 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-13Fix some significant problems with constant pools that resulted in ↵Evan Cheng
unnecessary paddings between constant pool entries, larger than necessary alignments (e.g. 8 byte alignment for .literal4 sections), and potentially other issues. 1. ConstantPoolSDNode alignment field is log2 value of the alignment requirement. This is not consistent with other SDNode variants. 2. MachineConstantPool alignment field is also a log2 value. 3. However, some places are creating ConstantPoolSDNode with alignment value rather than log2 values. This creates entries with artificially large alignments, e.g. 256 for SSE vector values. 4. Constant pool entry offsets are computed when they are created. However, asm printer group them by sections. That means the offsets are no longer valid. However, asm printer uses them to determine size of padding between entries. 5. Asm printer uses expensive data structure multimap to track constant pool entries by sections. 6. Asm printer iterate over SmallPtrSet when it's emitting constant pool entries. This is non-deterministic. Solutions: 1. ConstantPoolSDNode alignment field is changed to keep non-log2 value. 2. MachineConstantPool alignment field is also changed to keep non-log2 value. 3. Functions that create ConstantPool nodes are passing in non-log2 alignments. 4. MachineConstantPoolEntry no longer keeps an offset field. It's replaced with an alignment field. Offsets are not computed when constant pool entries are created. They are computed on the fly in asm printer and JIT. 5. Asm printer uses cheaper data structure to group constant pool entries. 6. Asm printer compute entry offsets after grouping is done. 7. Change JIT code to compute entry offsets on the fly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66875 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-13Convert VirtRegMap to a MachineFunctionPass.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66870 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-13Oops...I committed too much.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66867 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-13Temporarily XFAIL this test.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66866 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-12Fix a typo in a comment.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66843 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-12Reorganize some #include's.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66780 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-12Move 3 "(add (select cc, 0, c), x) -> (select cc, x, (add, x, c))"Chris Lattner
related transformations out of target-specific dag combine into the ARM backend. These were added by Evan in r37685 with no testcases and only seems to help ARM (e.g. test/CodeGen/ARM/select_xform.ll). Add some simple X86-specific (for now) DAG combines that turn things like cond ? 8 : 0 -> (zext(cond) << 3). This happens frequently with the recently added cp constant select optimization, but is a very general xform. For example, we now compile the second example in const-select.ll to: _test: movsd LCPI2_0, %xmm0 ucomisd 8(%esp), %xmm0 seta %al movzbl %al, %eax movl 4(%esp), %ecx movsbl (%ecx,%eax,4), %eax ret instead of: _test: movl 4(%esp), %eax leal 4(%eax), %ecx movsd LCPI2_0, %xmm0 ucomisd 8(%esp), %xmm0 cmovbe %eax, %ecx movsbl (%ecx), %eax ret This passes multisource and dejagnu. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66779 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-12Enable Chris' value propagation change. It make available known sign, zero, ↵Evan Cheng
one bits information for values that are live out of basic blocks. The goal is to eliminate unnecessary sext, zext, truncate of values that are live-in to blocks. This does not handle PHI nodes yet. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66777 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-11updateGabor Greif
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66733 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-11Reorganization: Move the Spiller out of VirtRegMap.cpp into its own files. ↵Owen Anderson
No (intended) functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66720 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-11My last coalescer fix introduced a subtler one. It's aborting a commuting ↵Evan Cheng
optimization too late and left the live intervals to be out of sync with instructions. This fixes 8b10b. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66715 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-11It makes no sense to have a ODR version of commonDuncan Sands
linkage, so remove it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66690 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-11Add parentheses to pacify gcc-4.3.Duncan Sands
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66653 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-11reapply my previous patch (r66358) with a tweak to set theChris Lattner
alignment of the generated constant pool entry to the desired alignment of a type. If we don't do this, we end up trying to do movsd from 4-byte alignment memory. This fixes 450.soplex and 456.hmmer. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66641 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-11Put the assignment back at the top of this method.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66611 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-11Two coalescer fixes in one.Evan Cheng
1. Use the same value# to represent unknown values being merged into sub-registers. 2. When coalescer commute an instruction and the destination is a physical register, update its sub-registers by merging in the extended ranges. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66610 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-10Make ivars private. Other cleanup. No functionality change.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66607 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-10Just make the Dwarf timer group static inside of the getter function. No ↵Bill Wendling
need to alloc/dealloc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66591 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-10Don't put static functions in anonymous namespace.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66589 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-10These should *stop* the timer, not start it again.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66586 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-10- Fix misspelled method name.Bill Wendling
- Remove unused method. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66585 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-10- Create GetOrCreateSourceID from getOrCreateSourceID. GetOrCreateSourceID isBill Wendling
the untimed version of getOrCreateSourceID. getOrCreateSourceID calls GetOrCreateSourceID, of course. - Move some methods into the "private" section. Constify at least one method. - General clean-ups. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66582 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-10Refine the Dwarf writer timers so that they measure exception writing and debugBill Wendling
writing individually. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66577 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-10Revert 66358 for now. It's breaking povray, 450.soplex, and 456.hmmer on x86 ↵Evan Cheng
/ Darwin. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66574 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-10Add a timer to the DwarfWriter pass that measures the total time it takes toBill Wendling
emit exception and debug Dwarf info. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66571 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-10Fix a post-RA scheduling liveness bug. When a basic block is beingDan Gohman
scheduled in multiple regions, liveness data used by the anti-dependence breaker is carried from one region to the next, however the information reflects the state of the instructions before scheduling. After scheduling, there may be new live range overlaps. Handle this by pessimizing the liveness data carried between regions to the point where it will be conservatively correct now matter how the earlier region is scheduled. This fixes a miscompilation in 176.gcc with the post-RA scheduler enabled. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66558 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-10wire up support for emitting "special" values from inline asmChris Lattner
format strings with the standard ${:foo} syntax. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66527 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-09Fix PR3763 by using proper APInt methods instead of uint64_t's.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66434 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-09Yet another case where the spiller marked two uses of the same register on ↵Evan Cheng
the same instruction as kill. This fixes PR3706. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66428 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-09just remove the use_empty() check entirely, the only reason itChris Lattner
existed was for llvm-gcc 3.4 (which used the __main hack) which is really really long dead. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66417 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-09Make the code generator rip of dead constant expr uses before decidingChris Lattner
whether a global is dead or not. This should fix PR3749 - linker adds spurious use to appending globals. I can't reasonably add a testcase for this, because the bc writer/reader strip dead constant users. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66404 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-09Pass in a std::string when getting the names of debugging things. This cuts downBill Wendling
on the number of times a std::string is created and copied. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66396 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-08If a MI uses the same register more than once, only mark one of them as 'kill'.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66363 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-08implement an optimization to codegen c ? 1.0 : 2.0 as load { 2.0, 1.0 } + c*4. Chris Lattner
For 2009-03-07-FPConstSelect.ll we now produce: _f: xorl %eax, %eax testl %edi, %edi movl $4, %ecx cmovne %rax, %rcx leaq LCPI1_0(%rip), %rax movss (%rcx,%rax), %xmm0 ret previously we produced: _f: subl $4, %esp cmpl $0, 8(%esp) movss LCPI1_0, %xmm0 je LBB1_2 ## entry LBB1_1: ## entry movss LCPI1_1, %xmm0 LBB1_2: ## entry movss %xmm0, (%esp) flds (%esp) addl $4, %esp ret on PPC the code also improves to: _f: cntlzw r2, r3 srwi r2, r2, 5 li r3, lo16(LCPI1_0) slwi r2, r2, 2 addis r3, r3, ha16(LCPI1_0) lfsx f1, r3, r2 blr from: _f: li r2, lo16(LCPI1_1) cmplwi cr0, r3, 0 addis r2, r2, ha16(LCPI1_1) beq cr0, LBB1_2 ; entry LBB1_1: ; entry li r2, lo16(LCPI1_0) addis r2, r2, ha16(LCPI1_0) LBB1_2: ; entry lfs f1, 0(r2) blr This also improves the existing pic-cpool case from: foo: subl $12, %esp call .Lllvm$1.$piclabel .Lllvm$1.$piclabel: popl %eax addl $_GLOBAL_OFFSET_TABLE_ + [.-.Lllvm$1.$piclabel], %eax cmpl $0, 16(%esp) movsd .LCPI1_0@GOTOFF(%eax), %xmm0 je .LBB1_2 # entry .LBB1_1: # entry movsd .LCPI1_1@GOTOFF(%eax), %xmm0 .LBB1_2: # entry movsd %xmm0, (%esp) fldl (%esp) addl $12, %esp ret to: foo: call .Lllvm$1.$piclabel .Lllvm$1.$piclabel: popl %eax addl $_GLOBAL_OFFSET_TABLE_ + [.-.Lllvm$1.$piclabel], %eax xorl %ecx, %ecx cmpl $0, 4(%esp) movl $8, %edx cmovne %ecx, %edx fldl .LCPI1_0@GOTOFF(%eax,%edx) ret This triggers a few dozen times in spec FP 2000. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66358 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-08random cleanups.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66357 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-07Introduce new linkage types linkonce_odr, weak_odr, common_odrDuncan Sands
and extern_weak_odr. These are the same as the non-odr versions, except that they indicate that the global will only be overridden by an *equivalent* global. In C, a function with weak linkage can be overridden by a function which behaves completely differently. This means that IP passes have to skip weak functions, since any deductions made from the function definition might be wrong, since the definition could be replaced by something completely different at link time. This is not allowed in C++, thanks to the ODR (One-Definition-Rule): if a function is replaced by another at link-time, then the new function must be the same as the original function. If a language knows that a function or other global can only be overridden by an equivalent global, it can give it the weak_odr linkage type, and the optimizers will understand that it is alright to make deductions based on the function body. The code generators on the other hand map weak and weak_odr linkage to the same thing. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66339 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-06Fix ScheduleDAGRRList::CopyAndMoveSuccessors' handling of nodesDan Gohman
with multiple chain operands. This can occur when the scheduler has added chain operands to a node that already has a chain operand, in order to handle physical register dependencies. This fixes an llvm-gcc bootstrap failure on x86-64 introduced in r66058. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66240 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-06When we split a basic block, there's a default branch to the newly created BB.Bill Wendling
Delete this default branch, because we're going to generate our own. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66234 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-05(Hopefully) silence a warning.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66158 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-05Be more careful about choosing restore points when doing restore folding. ↵Owen Anderson
This fixes some subtle miscompilations. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66147 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-05Fix how livein live intervals are handled. Previously it could end at MBB ↵Evan Cheng
start. Sorry, no small test case possible. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66129 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-04Fix BuildVectorSDNode::isConstantSplat to handle one-element vectors.Bob Wilson
It is an error to call APInt::zext with a size that is equal to the value's current size, so use zextOrTrunc instead. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66039 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-04Add a restore folder, which shaves a dozen or so machineinstrs off oggenc. ↵Owen Anderson
Update a testcase to check this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66029 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-04PR3686: make the legalizer handle bitcast from i80 to x86 long double.Eli Friedman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66021 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-04Fix PR3701. 1. X86 target renamed eflags register to flags. This matches ↵Evan Cheng
what llvm-gcc generates so codegen knows flags register is being clobbered by inline asm. 2. BURR scheduler should also check if inline asm nodes can clobber "live" physical registers. Previously it was only checking target nodes with implicit defs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65996 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-04The DAG combiner was performing a BT combine. The BT combine had a value of -1,Bill Wendling
so it changed it into a 31 via the TLO.ShrinkDemandedConstant() call. Then it would go through the DAG combiner again. This time it had a value of 31, which was turned into a -1 by TLI.SimplifyDemandedBits(). This would ping pong forever. Teach the TLO.ShrinkDemandedConstant() call not to lower a value if the demanded value is an XOR of all ones. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65985 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-02Generalize BuildVectorSDNode::isConstantSplat to use APInts and handleBob Wilson
arbitrary vector sizes. Add an optional MinSplatBits parameter to specify a minimum for the splat element size. Update the PPC target to use the revised interface. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65899 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-01Fix a problem with DAGCombine on 64b targets where foldingNate Begeman
extracts + build_vector into a shuffle would fail, because the type of the new build_vector would not be legal. Try harder to create a legal build_vector type. Note: this will be totally irrelevant once vector_shuffle no longer takes a build_vector for shuffle mask. New: _foo: xorps %xmm0, %xmm0 xorps %xmm1, %xmm1 subps %xmm1, %xmm1 mulps %xmm0, %xmm1 addps %xmm0, %xmm1 movaps %xmm1, 0 Old: _foo: xorps %xmm0, %xmm0 movss %xmm0, %xmm1 xorps %xmm2, %xmm2 unpcklps %xmm1, %xmm2 pshufd $80, %xmm1, %xmm1 unpcklps %xmm1, %xmm2 pslldq $16, %xmm2 pshufd $57, %xmm2, %xmm1 subps %xmm0, %xmm1 mulps %xmm0, %xmm1 addps %xmm0, %xmm1 movaps %xmm1, 0 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65791 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-01Minor optimization:Evan Cheng
Look for situations like this: %reg1024<def> = MOV r1 %reg1025<def> = MOV r0 %reg1026<def> = ADD %reg1024, %reg1025 r0 = MOV %reg1026 Commute the ADD to hopefully eliminate an otherwise unavoidable copy. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65752 91177308-0d34-0410-b5e6-96231b3b80d8
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