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2007-04-09implement CodeGen/X86/inline-asm-x-scalar.ll:test3Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35802 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-09add some assertionsChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35800 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-09Fix a bug introduced with my previous patch, where it didn't correctly handleChris Lattner
instructions which replace themselves when FI's are rewritten (common on ppc). This fixes CodeGen/PowerPC/2006-10-17-ppc64-alloca.ll git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35789 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-09Fix CodeGen/Generic/2007-04-08-MultipleFrameIndices.ll and PR1308:Chris Lattner
some instructions can have multiple frame indices in them. If this happens, rewrite all of them. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35785 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-09Fix PR1316Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35783 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-08Fix for CodeGen/X86/2007-04-08-InlineAsmCrash.ll and PR1314Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35779 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-06minor comment fixChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35696 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-05Change the bit_part_select (non)implementation from "return 0" to abort.Reid Spencer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35679 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-04Implement the llvm.bit.part_select.iN.iN.iN overloaded intrinsic.Reid Spencer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35678 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-04Properly emit range comparisons for switch cases, where neighbour casesAnton Korobeynikov
go to the same destination. Now we're producing really good code for switch-lower-feature.ll testcase git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35672 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-04Re-materialize all loads from fixed stack slots.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35660 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-04Trivially re-materializable instructions have spill weights that are half of ↵Evan Cheng
what it would be otherwise. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35658 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-03Bad bad bug. findRegisterUseOperand() returns -1 if a use if not found.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35618 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-021. Insert custom lowering hooks for ISD::ROTR and ISD::ROTL.Scott Michel
2. Help DAGCombiner recognize zero/sign/any-extended versions of ROTR and ROTL patterns. This was motivated by the X86/rotate.ll testcase, which should now generate code for other platforms (and soon-to-come platforms.) Rewrote code slightly to make it easier to read. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35605 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-02Ugh. Copy coalescer does not update register numbers.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35600 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-02For PR1297:Reid Spencer
Make sure that the CTPOP result is casted to i32 as the bit counting intrinsics all return i32 now (this affects CTLZ and CTTZ as well). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35567 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-01For PR1297:Reid Spencer
Support overloaded intrinsics bswap, ctpop, cttz, ctlz. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35547 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-01For PR1297:Reid Spencer
Adjust for changes in the bit counting intrinsics. They all return i32 now so we have to trunc/zext the DAG node accordingly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35546 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-01For PR1297:Reid Spencer
Change getOperationName to return std::string instead of const char* git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35545 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-31move a bunch of code out of the sdisel pass into its own opt pass ↵Chris Lattner
"codegenprepare". git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35529 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-31switch TL::getValueType to use MVT::getValueType.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35527 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-31Add a -print-lsr-output option to LLC, to print the output of the LSR pass.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35522 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-30add one addressing mode description hook to rule them all.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35520 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-30Fix incorrect combination of different loads. Reenable zext-over-truncateDale Johannesen
combination. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35517 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-30Don't add the same MI to register reuse "last def/use" twice if it reads theEvan Cheng
register more than once. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35513 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-30Bug fix for PR1279. When isDead is propagate by copy coalescing, we keep lengthEvan Cheng
of dead def live interval at 1 to avoid multiple def's targeting the same register. The previous patch missed a case where the source operand is live-in. In that case, remove the whole interval. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35512 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-29Disable load width reduction xform of variant (zext (truncate load x)) forEvan Cheng
big endian targets until llvm-gcc build issue has been resolved. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35449 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-29New entries.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35445 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-28Notes on re-materialization.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35420 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-28Move rematerialization out of beta.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35419 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-28Scale 1 is always ok.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35407 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-28Remove isLegalAddressImmediate.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35406 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-28GEP index sinking fixes:Evan Cheng
1) Take address scale into consideration. e.g. i32* -> scale 4. 2) Examine all the users of GEP. 3) Generalize to inter-block GEP's (no longer uses loopinfo). 4) Don't do xform if GEP has other variable index(es). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35403 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-28Fix for PR1279. Dead def has a live interval of length 1. Copy coalescing shouldEvan Cheng
not violate that. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35396 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-27Remove dead codeAnton Korobeynikov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35380 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-27Split big monster into small helpers. No functionality change.Anton Korobeynikov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35379 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-27SDISel does not preserve all, it changes CFG and other info.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35376 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-27Don't call getOperandConstraint() if operand index is greater thanEvan Cheng
TID->numOperands. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35375 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-26Fix for PR1266. Don't mark a two address operand IsKill.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35365 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-26Change findRegisterUseOperand() to return operand index instead.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35363 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-26Fix reversed logic in getRegsUsed. Rename RegStates to RegsAvailable toDale Johannesen
hopefully forestall similar errors. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35362 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-26SIGN_EXTEND_INREG requires one extra operand, a ValueType node.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35350 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-25First step of switch lowering refactoring: perform worklist-drivenAnton Korobeynikov
strategy, emit JT's where possible. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35338 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-25Implement support for vector operands to inline asm, implementingChris Lattner
CodeGen/X86/2007-03-24-InlineAsmVectorOp.ll git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35332 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-25implement initial support for the silly X constraint. Testcase here: ↵Chris Lattner
CodeGen/X86/2007-03-24-InlineAsmXConstraint.ll git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35327 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-25Implement CodeGen/X86/2007-03-24-InlineAsmMultiRegConstraint.llChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35324 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-25switch TargetLowering::getConstraintType to take the entire constraint,Chris Lattner
not just the first letter. No functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35322 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-24don't rely on ADLChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35299 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-24Adjust offset to compensate for big endian machines.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35293 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-23Make sure SEXTLOAD of the specific type is supported on the target.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35289 91177308-0d34-0410-b5e6-96231b3b80d8
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