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2005-12-18More corrections for flagged copyto/from regChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24828 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-18legalize copytoreg and copyfromreg nodes that have flag operands correctly.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24826 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-18Fix a bug Sabre was having where the DAG root was a group. The group dominatorJim Laskey
needed to be added to the ordering list, not the first member of the group. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24816 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-18Groups were not emitted if the dominator node and the node in the ordering listJim Laskey
were not the same node. Ultimately the test was bogus. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24815 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-18Simplify codeChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24806 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17allow custom expansion of BR_CCChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24804 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17X86 lowers SELECT to a cmp / test followed by a conditional move.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24754 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-16Added source file/line correspondence for dwarf (PowerPC only at this point.)Jim Laskey
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24748 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-15Don't create SEXTLOAD/ZEXTLOAD instructions that the target doesn't supportChris Lattner
if after legalize. This fixes IA64 failures. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24725 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-14When folding loads into ops, immediately replace uses of the op with theChris Lattner
load. This reduces number of worklist iterations and avoid missing optimizations depending on folding of things into sext_inreg nodes (which aren't supported by all targets). Tested by Regression/CodeGen/X86/extend.ll:test2 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24712 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-14Fix the (zext (zextload)) case to trigger, similarly for sign extends.Chris Lattner
Allow (zext (truncate)) to apply after legalize if the target supports AND (which all do). This compiles short %foo() { %tmp.0 = load ubyte* %X ; <ubyte> [#uses=1] %tmp.3 = cast ubyte %tmp.0 to short ; <short> [#uses=1] ret short %tmp.3 } to: _foo: movzbl _X, %eax ret instead of: _foo: movzbl _X, %eax movzbl %al, %eax ret thanks to Evan for pointing this out. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24709 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-14Fix a miscompilation in crafty due to a recent patchChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24706 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-14Fold (zext (load x) to (zextload x).Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24702 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-13Don't lump the filename and working dir togetherChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24697 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-13Add a couple more fields, move ctor init list to .cpp file, add supportChris Lattner
for emitting the ctor/dtor list for common targets. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24694 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-13Lowering constant pool entries on ppc exposed a bug in the recently addedNate Begeman
ConstantVec legalizing code, which would return constantpool nodes that were not of the target's pointer type. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24691 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-12Accept and ignore prefetches for nowChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24678 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-12Fix CodeGen/Generic/2005-12-12-ExpandSextInreg.llChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24677 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-11Minor tweak to get isel optChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24663 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-10Add support for TargetConstantPool nodes to the dag isel emitter, and useNate Begeman
them in the PPC backend, to simplify some logic out of Select and SelectAddr. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24657 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-10Added new getNode and getTargetNode variants for X86 stores.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24653 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-09Avoid emitting two tabs when switching to a named sectionChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24646 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-09Teach legalize how to promote sext_inreg to fix a problem Andrew pointedChris Lattner
out to me. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24644 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-08improve code insertion in two ways:Chris Lattner
1. Only forward subst offsets into loads and stores, not into arbitrary things, where it will likely become a load. 2. If the source is a cast from pointer, forward subst the cast as well, allowing us to fold the cast away (improving cases when the cast is from an alloca or global). This hasn't been fully tested, but does appear to further reduce register pressure and improve code. Lets let the testers grind on it a bit. :) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24640 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-07Fix a crash where ConstantVec nodes were being generated with the wrongNate Begeman
type when the target did not support them. Also teach Legalize how to expand ConstantVecs. This allows us to generate _test: lwz r2, 12(r3) lwz r4, 8(r3) lwz r5, 4(r3) lwz r6, 0(r3) addi r2, r2, 4 addi r4, r4, 3 addi r5, r5, 2 addi r6, r6, 1 stw r2, 12(r3) stw r4, 8(r3) stw r5, 4(r3) stw r6, 0(r3) blr For: void %test(%v4i *%P) { %T = load %v4i* %P %S = add %v4i %T, <int 1, int 2, int 3, int 4> store %v4i %S, %v4i * %P ret void } On PowerPC. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24633 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-07Only transform (sext (truncate x)) -> (sextinreg x) if before legalize orChris Lattner
if the target supports the resultant sextinreg git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24632 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-07Teach the dag combiner to turn a truncate/sign_extend pair into a sextinregChris Lattner
when the types match up. This allows the X86 backend to compile: sbyte %toggle_value(sbyte* %tmp.1) { %tmp.2 = load sbyte* %tmp.1 ret sbyte %tmp.2 } to this: _toggle_value: mov %EAX, DWORD PTR [%ESP + 4] movsx %EAX, BYTE PTR [%EAX] ret instead of this: _toggle_value: mov %EAX, DWORD PTR [%ESP + 4] movsx %EAX, BYTE PTR [%EAX] movsx %EAX, %AL ret noticed in Shootout/objinst. -Chris git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24630 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-06Teach the SelectionDAG ISel how to turn ConstantPacked values intoNate Begeman
constant nodes with vector types. Also teach the asm printer how to print ConstantPacked constant pool entries. This allows us to generate altivec code such as the following, which adds a vector constantto a packed float. LCPI1_0: <4 x float> < float 0.0e+0, float 0.0e+0, float 0.0e+0, float 1.0e+0 > .space 4 .space 4 .space 4 .long 1065353216 ; float 1 .text .align 4 .globl _foo _foo: lis r2, ha16(LCPI1_0) la r2, lo16(LCPI1_0)(r2) li r4, 0 lvx v0, r4, r2 lvx v1, r4, r3 vaddfp v0, v1, v0 stvx v0, r4, r3 blr For the llvm code: void %foo(<4 x float> * %a) { entry: %tmp1 = load <4 x float> * %a; %tmp2 = add <4 x float> %tmp1, < float 0.0, float 0.0, float 0.0, float 1.0 > store <4 x float> %tmp2, <4 x float> *%a ret void } git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24616 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-05Fix the #1 code quality problem that I have seen on X86 (and it also affectsChris Lattner
PPC and other targets). In a particular, consider code like this: struct Vector3 { double x, y, z; }; struct Matrix3 { Vector3 a, b, c; }; double dot(Vector3 &a, Vector3 &b) { return a.x * b.x + a.y * b.y + a.z * b.z; } Vector3 mul(Vector3 &a, Matrix3 &b) { Vector3 r; r.x = dot( a, b.a ); r.y = dot( a, b.b ); r.z = dot( a, b.c ); return r; } void transform(Matrix3 &m, Vector3 *x, int n) { for (int i = 0; i < n; i++) x[i] = mul( x[i], m ); } we compile transform to a loop with all of the GEP instructions for indexing into 'm' pulled out of the loop (9 of them). Because isel occurs a bb at a time we are unable to fold the constant index into the loads in the loop, leading to PPC code that looks like this: LBB3_1: ; no_exit.preheader li r2, 0 addi r6, r3, 64 ;; 9 values live across the loop body! addi r7, r3, 56 addi r8, r3, 48 addi r9, r3, 40 addi r10, r3, 32 addi r11, r3, 24 addi r12, r3, 16 addi r30, r3, 8 LBB3_2: ; no_exit lfd f0, 0(r30) lfd f1, 8(r4) fmul f0, f1, f0 lfd f2, 0(r3) ;; no constant indices folded into the loads! lfd f3, 0(r4) lfd f4, 0(r10) lfd f5, 0(r6) lfd f6, 0(r7) lfd f7, 0(r8) lfd f8, 0(r9) lfd f9, 0(r11) lfd f10, 0(r12) lfd f11, 16(r4) fmadd f0, f3, f2, f0 fmul f2, f1, f4 fmadd f0, f11, f10, f0 fmadd f2, f3, f9, f2 fmul f1, f1, f6 stfd f0, 0(r4) fmadd f0, f11, f8, f2 fmadd f1, f3, f7, f1 stfd f0, 8(r4) fmadd f0, f11, f5, f1 addi r29, r4, 24 stfd f0, 16(r4) addi r2, r2, 1 cmpw cr0, r2, r5 or r4, r29, r29 bne cr0, LBB3_2 ; no_exit uh, yuck. With this patch, we now sink the constant offsets into the loop, producing this code: LBB3_1: ; no_exit.preheader li r2, 0 LBB3_2: ; no_exit lfd f0, 8(r3) lfd f1, 8(r4) fmul f0, f1, f0 lfd f2, 0(r3) lfd f3, 0(r4) lfd f4, 32(r3) ;; much nicer. lfd f5, 64(r3) lfd f6, 56(r3) lfd f7, 48(r3) lfd f8, 40(r3) lfd f9, 24(r3) lfd f10, 16(r3) lfd f11, 16(r4) fmadd f0, f3, f2, f0 fmul f2, f1, f4 fmadd f0, f11, f10, f0 fmadd f2, f3, f9, f2 fmul f1, f1, f6 stfd f0, 0(r4) fmadd f0, f11, f8, f2 fmadd f1, f3, f7, f1 stfd f0, 8(r4) fmadd f0, f11, f5, f1 addi r6, r4, 24 stfd f0, 16(r4) addi r2, r2, 1 cmpw cr0, r2, r5 or r4, r6, r6 bne cr0, LBB3_2 ; no_exit This is much nicer as it reduces register pressure in the loop a lot. On X86, this takes the function from having 9 spilled registers to 2. This should help some spec programs on X86 (gzip?) This is currently only enabled with -enable-gep-isel-opt to allow perf testing tonight. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24606 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-03dbg.stoppoint returns a value, don't forget to init itChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24583 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-02bah, must generate all resultsAndrew Lenharth
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24574 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-02cycle counter fixAndrew Lenharth
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24573 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-01Don't remove two operand, two result nodes from the binary ops map. TheseChris Lattner
should come from the arbitrary ops map. This fixes Regression/CodeGen/PowerPC/2005-12-01-Crash.ll git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24571 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-01Promote line and column number information for our friendly 64-bit targets.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24568 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-01This is a bugfix for SelectNodeTo. In certain situations, we could beChris Lattner
selecting a node and use a mix of getTargetNode() and SelectNodeTo. Because SelectNodeTo didn't check the CSE maps for a preexisting node and didn't insert its result into the CSE maps, we would sometimes miss a CSE opportunity. This is extremely rare, but worth fixing for completeness. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24565 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-01Support multiple ValueTypes per RegisterClass, needed for upcoming vectorNate Begeman
work. This change has no effect on generated code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24563 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-30Make SelectNodeTo return NChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24548 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-30CALLSEQ_START/END nodes don't get memoized, do not add them in whenChris Lattner
replaceAllUses'ing. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24539 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-30At long last, you can say that f32 isn't supported for setccAndrew Lenharth
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24537 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-30First chunk of actually generating vector code for packed types. TheseNate Begeman
changes allow us to generate the following code: _foo: li r2, 0 lvx v0, r2, r3 vaddfp v0, v0, v0 stvx v0, r2, r3 blr for this llvm: void %foo(<4 x float>* %a) { entry: %tmp1 = load <4 x float>* %a %tmp2 = add <4 x float> %tmp1, %tmp1 store <4 x float> %tmp2, <4 x float>* %a ret void } git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24534 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-30add support for custom lowering SINT_TO_FPAndrew Lenharth
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24531 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-30Fix a problem with llvm-ranlib that (on some platforms) caused the archiveReid Spencer
file to become corrupted due to interactions between mmap'd memory segments and file descriptors closing. The problem is completely avoiding by using a third temporary file. Patch provided by Evan Jones git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24527 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-30Fixed a bug introduced by my last commit: TargetGlobalValues should key onEvan Cheng
GlobalValue * and index pair. Update getGlobalAddress() for symmetry. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24524 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-30Added an index field to GlobalAddressSDNode so it can represent X+12, etc.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24523 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-29Add support for a new STRING and LOCATION node for line number support, patchChris Lattner
contributed by Daniel Berlin, with a few cleanups here and there by me. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24515 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-29Add the majority of the vector machien value types we expect to support,Nate Begeman
and make a few changes to the legalization machinery to support more than 16 types. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24511 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-22Check in code to scalarize arbitrarily wide packed types for some simpleNate Begeman
vector operations (load, add, sub, mul). This allows us to codegen: void %foo(<4 x float> * %a) { entry: %tmp1 = load <4 x float> * %a; %tmp2 = add <4 x float> %tmp1, %tmp1 store <4 x float> %tmp2, <4 x float> *%a ret void } on ppc as: _foo: lfs f0, 12(r3) lfs f1, 8(r3) lfs f2, 4(r3) lfs f3, 0(r3) fadds f0, f0, f0 fadds f1, f1, f1 fadds f2, f2, f2 fadds f3, f3, f3 stfs f0, 12(r3) stfs f1, 8(r3) stfs f2, 4(r3) stfs f3, 0(r3) blr git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24484 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-22Rather than attempting to legalize 1 x float, make sure the SD ISel neverNate Begeman
generates it. Make MVT::Vector expand-only, and remove the code in Legalize that attempts to legalize it. The plan for supporting N x Type is to continually epxand it in ExpandOp until it gets down to 2 x Type, where it will be scalarized into a pair of scalars. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24482 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21I think I know what you meant here, but just to be safe I'll let youDuraid Madina
do it. :) <_sabre_> excuses excuses git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24471 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21Allow target to customize directive used to switch to arbitrary section in ↵Chris Lattner
SwitchSection, add generic constant pool emitter git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24464 91177308-0d34-0410-b5e6-96231b3b80d8
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