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2008-12-16Enable anti-dependence breaking by default when post-RA scheduling is enabled.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61078 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-16When breaking an anti-dependency, don't use a register which has seenDan Gohman
one of its aliases defined. This is conservative, but tricky subreg corner cases are outside the primary aim of this pass. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61077 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-16Add initial support for back-scheduling address computations,Dan Gohman
especially in the case of addresses computed from loop induction variables. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61075 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-16Remove some special-case logic in ScheduleDAGSDNodes's Dan Gohman
latency computation code that is no longer needed with the new method for handling latencies. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61074 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-16Fix some register-alias-related bugs in the post-RA scheduler livenessDan Gohman
computation code. Also, avoid adding output-depenency edges when both defs are dead, which frequently happens with EFLAGS defs. Compute Depth and Height lazily, and always in terms of edge latency values. For the schedulers that don't care about latency, edge latencies are set to 1. Eliminate Cycle and CycleBound, and LatencyPriorityQueue's Latencies array. These are all subsumed by the Depth and Height fields. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61073 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-16Add a simple target-independent heuristic to allow targets with noDan Gohman
instruction itinerary data to back-schedule loads. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61070 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-16Move addPred and removePred out-of-line.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61067 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-16Make addPred and removePred return void, since the return value is notDan Gohman
currently used by anything. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61066 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-16This getEdgeAttributes doesn't need a template argument.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61065 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-15Added support for splitting and scalarizing vector shifts.Mon P Wang
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61050 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-15Fix printing of PseudoSourceValues in SDNode graphs.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61036 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-15Added support to LegalizeType for expanding the operands of scalar to vectorMon P Wang
and insert vector element. Modified extract vector element to extend the result to match the expected promoted type. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61029 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-14Reapply r60997, this time without forgetting thatDuncan Sands
target constants are allowed to have an illegal type. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61006 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-13Temporarily revert r60997. It was causing this failure:Bill Wendling
Running /Users/void/llvm/llvm.src/test/CodeGen/Generic/dg.exp ... FAIL: /Users/void/llvm/llvm.src/test/CodeGen/Generic/asm-large-immediate.ll Failed with exit(1) at line 1 while running: llvm-as < /Users/void/llvm/llvm.src/test/CodeGen/Generic/asm-large-immediate.ll | llc | /usr/bin/grep 68719476738 Assertion failed: ((TypesNeedLegalizing || getTypeAction(VT) == Legal) && "Illegal type introduced after type legalization?"), function HandleOp, file /Users/void/llvm/llvm.src/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp, line 493. 0 llc 0x0085392e char const* std::find<char const*, char>(char const*, char const*, char const&) + 98 1 llc 0x00853e63 llvm::sys::PrintStackTraceOnErrorSignal() + 593 2 libSystem.B.dylib 0x96cac09b _sigtramp + 43 3 libSystem.B.dylib 0xffffffff _sigtramp + 1765097359 4 libSystem.B.dylib 0x96d24ec2 raise + 26 5 libSystem.B.dylib 0x96d3447f abort + 73 6 libSystem.B.dylib 0x96d26063 __assert_rtn + 101 7 llc 0x004f9018 llvm::cast_retty<llvm::SubprogramDesc, llvm::DebugInfoDesc*>::ret_type llvm::cast<llvm::Sub ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61001 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-13LegalizeDAG is not supposed to introduce illegalDuncan Sands
types into the DAG if they were not already there. Check this with an assertion. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60997 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-13Remove assertion to allow promotion of a truncating store operandMon P Wang
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60975 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-13Added basic support for expanding VSETCCMon P Wang
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60974 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-13On big-endian machines it is wrong to do a fullDuncan Sands
width register load followed by a truncating store for the copy, since the load will not place the value in the lower bits. Probably partial loads/stores can never happen here, but fix it anyway. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60972 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-12Do not print empty DW_AT_comp_dir.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60965 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-12When expanding unaligned loads and stores do not makeDuncan Sands
use of illegal integer types: instead, use a stack slot and copying via integer registers. The existing code is still used if the bitconvert is to a legal integer type. This fires on the PPC testcases 2007-09-08-unaligned.ll and vec_misaligned.ll. It looks like equivalent code is generated with these changes, just permuted, but it's hard to tell. With these changes, nothing in LegalizeDAG produces illegal integer types anymore. This is a prerequisite for removing the LegalizeDAG type legalization code. While there I noticed that the existing code doesn't handle trunc store of f64 to f32: it turns this into an i64 store, which represents a 4 byte stack smash. I added a FIXME about this. Hopefully someone more motivated than I am will take care of it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60964 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-12Fix add/sub expansion: don't create ADD / SUB with two results (seems like ↵Evan Cheng
everyone is doing this these days :-). Patch by Daniel M Gessel! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60958 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-12When using a 4 byte jump table on a 64 bit machine,Duncan Sands
do an extending load of the 4 bytes rather than a potentially illegal (type) i32 load followed by a sign extend. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60945 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-12Added support for SELECT v8i8 v4i16 for X86 (MMX)Mon P Wang
Added support for TRUNC v8i16 to v8i8 for X86 (MMX) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60916 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-12Redo the arithmetic with overflow architecture. I was changing the semantics ofBill Wendling
ISD::ADD to emit an implicit EFLAGS. This was horribly broken. Instead, replace the intrinsic with an ISD::SADDO node. Then custom lower that into an X86ISD::ADD node with a associated SETCC that checks the correct condition code (overflow or carry). Then that gets lowered into the correct X86::ADDOvf instruction. Similar for SUB and MUL instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60915 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-11Avoid generating a convert_rndsat node when the src and dest type are the same.Mon P Wang
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60869 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-11Clarify FIXME.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60867 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-11Whitespace clean up (tabs with spaces)Mon P Wang
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60866 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-11Make fix for r60829 less conservative to allow the proper optimization forMon P Wang
vec_extract-sse4.ll. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60865 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-10Add a newline after this debug output.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60861 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-10If ADD, SUB, or MUL have an overflow bit that's used, don't do transformation onBill Wendling
them. The DAG combiner expects that nodes that are transformed have one value result. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60857 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-10For amusement, implement SADDO, SSUBO, UADDO, USUBODuncan Sands
for promoted integer types, eg: i16 on ppc-32, or i24 on any platform. Complete support for arbitrary precision integers would require handling expanded integer types, eg: i128, but I couldn't be bothered. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60834 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-10Fixed a bug when trying to optimize a extract vector element of aMon P Wang
bit convert that changes the number of elements of a shuffle. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60829 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-10Fix MachineCodeEmitter to use uintptr_t instead of intptr_t. This avoids ↵Evan Cheng
some overflow issues. Patch by Thomas Jablin. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60828 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-10Whitespace changes.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60826 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-10Whitespace fixes.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60818 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-10Update CalcLatency to work in terms of edge latencies, rather thanDan Gohman
node latencies. Use CalcLatency instead of manual code in CalculatePriorities to keep it consistent. Previously it computed slightly different results. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60817 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-10Fix a couple of Dwarf bugs.Evan Cheng
- Emit DW_AT_byte_size for struct and union of size zero. - Emit DW_AT_declaration for forward type declaration. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60812 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-09Rewrite the SDep class, and simplify some of the related code.Dan Gohman
The Cost field is removed. It was only being used in a very limited way, to indicate when the scheduler should attempt to protect a live register, and it isn't really needed to do that. If we ever want the scheduler to start inserting copies in non-prohibitive situations, we'll have to rethink some things anyway. A Latency field is added. Instead of giving each node a single fixed latency, each edge can have its own latency. This will eventually be used to model various micro-architecture properties more accurately. The PointerIntPair class and an internal union are now used, which reduce the overall size. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60806 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-09Minor code simplification.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60804 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-09Add sub/mul overflow intrinsics. This currently doesn't have aBill Wendling
target-independent way of determining overflow on multiplication. It's very tricky. Patch by Zoltan Varga! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60800 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-09Fix PR3117: not all nodes being legalized. TheDuncan Sands
essential problem was that the DAG can contain random unused nodes which were never analyzed. When remapping a value of a node being processed, such a node may become used and need to be analyzed; however due to operands being transformed during analysis the node may morph into a different one. Users of the morphing node need to be updated, and this wasn't happening. While there I added a bunch of documentation and sanity checks, so I (or some other poor soul) won't have to scratch their head over this stuff so long trying to remember how it was all supposed to work next time some obscure problem pops up! The extra sanity checking exposed a few places where invariants weren't being preserved, so those are fixed too. Since some of the sanity checking is expensive, I added a flag to turn it on. It is also turned on when building with ENABLE_EXPENSIVE_CHECKS=1. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60797 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-09Cosmetic changes.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60771 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-09Whitespace cleanups.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60769 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-09In LegalizeOp, don't change the result type of CONVERT_RNDSAT when promotingMon P Wang
one of its operand. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60749 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-09Fix getNode to allow a vector for the shift amount for shifts of vectors.Mon P Wang
Fix the shift amount when unrolling a vector shift into scalar shifts. Fix problem in getShuffleScalarElt where it assumes that the input of a bit convert must be a vector. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60740 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-09Don't charge full latency for an anti-dependence, in this simplisticDan Gohman
pipeline model. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60733 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-08Fix the top-level comments, and fix some 80-column violations.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60707 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-08Factor out the code for sign-extending/truncating gep indicesDan Gohman
and use it in x86 address mode folding. Also, make getRegForValue return 0 for illegal types even if it has a ValueMap for them, because Argument values are put in the ValueMap. This fixes PR3181. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60696 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-08Move createVirtualRegister out-of-line.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60684 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-08Clarify some comments.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60683 91177308-0d34-0410-b5e6-96231b3b80d8
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