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2006-05-16Print the vreg that livein physregs are live inChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28314 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-16Legalize FORMAL_ARGUMENTS nodes correctly, we don't want to legalize them onceChris Lattner
for each argument. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28313 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-13Fixing 2006-05-01-SchedCausingSpills.ll; some clean upEvan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28279 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-13Revert an un-intended changeEvan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28278 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-13Merge identical code.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28274 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-12If the register allocator cannot find a register to spill, try the aliases. IfEvan Cheng
that still fails (because all the register spill weights are inf), just grab one. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28262 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-12Remove dead varsChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28255 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-12remove dead varsChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28254 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-12Remove dead variableChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28253 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-12Comment out dead variablesChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28252 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-12Remove dead varChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28250 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-12Compile:Chris Lattner
%tmp152 = setgt uint %tmp144, %tmp149 ; <bool> [#uses=1] %tmp159 = setlt uint %tmp144, %tmp149 ; <bool> [#uses=1] %bothcond2 = or bool %tmp152, %tmp159 ; <bool> [#uses=1] To setne, not setune, which causes an assertion fault. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28244 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-12Refactor a bunch of includes so that TargetMachine.h doesn't have to includeOwen Anderson
TargetData.h. This should make recompiles a bit faster with my current TargetData tinkering. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28238 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-12Backing out fix for PR770. Need to re-apply it after live range splitting is ↵Evan Cheng
possible git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28236 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-12Duh. That could take a long time.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28235 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-12Two simplifications for token factor nodes: simplify tf(x,x) -> x.Chris Lattner
simplify tf(x,y,y,z) -> tf(x,y,z). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28233 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-12Add capability to scheduler to commute nodes for profit.Evan Cheng
If a two-address code whose first operand has uses below, it should be commuted when possible. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28230 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-11Refactor scheduler code. Move register-reduction list scheduler to aEvan Cheng
separate file. Added an initial implementation of top-down register pressure reduction list scheduler. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28226 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-11Set weight of zero length intervals to infinite to prevent them from beingEvan Cheng
spilled. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28220 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-11Backing out previous check-in.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28219 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-10If the live interval legnth is essentially zero, i.e. in every live rangeEvan Cheng
the use follows def immediately, it doesn't make sense to spill it and hope it will be easier to allocate for this LI. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28217 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-10Templatify RegReductionPriorityQueueEvan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28212 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-09Fix PR773Nate Begeman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28207 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-09Fix a regression in my patch from last night that broke the llvmgcc4 build onChris Lattner
ppc git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28205 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-09Add pseudo dependency to force a def&use operand to be scheduled last (unlessEvan Cheng
the distance between the def and another use is much longer). This is under option control for now "-sched-lower-defnuse". git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28201 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-09Debugging infoEvan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28200 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-09PR 770 - permit coallescing of registers in subset register classes.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28197 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-09Implement MASM sections correctly, without a "has masm sections flag" and a ↵Chris Lattner
bunch of special case code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28194 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-09Oh yeah, there are two of these now, unify both.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28192 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-09Setting SwitchToSectionDirective properly in the MASM backend permits a bunchChris Lattner
of code to be unified. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28191 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-09Don't prefix section directives with a tab. Doing so causes blank lines toChris Lattner
be emitted to the .s file. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28189 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-09Make the masm codepath work like the normal code path.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28188 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-09The MASM asmprinter has been fixed, these hacks are no longer needed.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28186 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-09Split SwitchSection into SwitchTo{Text|Data}Section methods.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28184 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-08Make the case I just checked in stronger. Now we compile this:Chris Lattner
short test2(short X, short x) { int Y = (short)(X+x); return Y >> 1; } to: _test2: add r2, r3, r4 extsh r2, r2 srawi r3, r2, 1 blr instead of: _test2: add r2, r3, r4 extsh r2, r2 srwi r2, r2, 1 extsh r3, r2 blr git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28175 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-08Implement and_sext.ll:test3, generating:Chris Lattner
_test4: srawi r3, r3, 16 blr instead of: _test4: srwi r2, r3, 16 extsh r3, r2 blr for: short test4(unsigned X) { return (X >> 16); } git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28174 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-08Compile this:Chris Lattner
short test4(unsigned X) { return (X >> 16); } to: _test4: movl 4(%esp), %eax sarl $16, %eax ret instead of: _test4: movl $-65536, %eax andl 4(%esp), %eax sarl $16, %eax ret git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28171 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-08Fold shifts with undef operands.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28167 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-08When tracking demanded bits, if any bits from the sext of an SRA are demanded,Chris Lattner
then so is the input sign bit. This fixes mediabench/g721 on X86. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28166 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-08Make emission of jump tables a bit less conservative; they are now requiredNate Begeman
to be only 31.25% dense, rather than 75% dense. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28165 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-08Fix PR772Nate Begeman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28161 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-06Use ComputeMaskedBits to determine # sign bits as a fallback. This allows usChris Lattner
to handle all kinds of stuff, including silly things like: sextinreg(setcc,i16) -> setcc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28155 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-06Add some more sign propagation casesChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28154 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-06Simplify some code, add a couple minor missed foldsChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28152 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-06constant fold sign_extend_inregChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28151 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-06remove cases handled elsewhereChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28150 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-06Add some more simple sign bit propagation cases.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28149 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-06Fix some loose ends in MASM support.Jeff Cohen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28148 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-06Use the new TargetLowering::ComputeNumSignBits method to eliminateChris Lattner
sign_extend_inreg operations. Though ComputeNumSignBits is still rudimentary, this is enough to compile this: short test(short X, short x) { int Y = X+x; return (Y >> 1); } short test2(short X, short x) { int Y = (short)(X+x); return Y >> 1; } into: _test: add r2, r3, r4 srawi r3, r2, 1 blr _test2: add r2, r3, r4 extsh r2, r2 srawi r3, r2, 1 blr instead of: _test: add r2, r3, r4 srawi r2, r2, 1 extsh r3, r2 blr _test2: add r2, r3, r4 extsh r2, r2 srawi r2, r2, 1 extsh r3, r2 blr git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28146 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-06Add some really really simple code for computing sign-bit propagation.Chris Lattner
This will certainly be enhanced in the future. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28145 91177308-0d34-0410-b5e6-96231b3b80d8
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