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2008-09-24Set SetStore to false, to allow this pass to deleteDan Gohman
dead loads. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56529 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-24Add a method to MachineInstr for testing whether it makesDan Gohman
any volatile memory references. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56528 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-24Properly handle 'm' inline asm constraints. If a GV is being selected for ↵Evan Cheng
the addressing mode, it requires the same logic for PIC relative addressing, etc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56526 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-23s/ParameterAttributes/Attributes/gDevang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56513 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-23Now that DeadMachineInstructionElim is basically workingDan Gohman
correctly, it's not necessary to explicitly remove registers from their use-def lists. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56509 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-23Arrange for FastISel code to have access to the MachineModuleInfoDan Gohman
object. This will be needed to support debug info. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56508 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-23Track local physical register liveness. This is not the mostDan Gohman
efficient implementation possible, but it's pretty simple and good enough for the time being. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56504 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-23Replace the LiveRegs SmallSet with a simple counter that keepsDan Gohman
track of the number of live registers, which is all the set was being used for. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56498 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-23Add initial support for inserting last minute copies.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56485 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-22Fix the alignment of loads from constant pool entries when theDan Gohman
load address has an offset from the base of the constant pool entry. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56479 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-22Livestacks really does preserve everything.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56476 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-22Instead of setPreservesAll, just mark them preseving machine loop info and ↵Evan Cheng
machine dominators. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56475 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-22Significant improvements to the logic for merging live intervals. This code ↵Owen Anderson
can't just use LI::MergeValueAsValue, as its behavior in the presence of overlapping ranges isn't what StrongPHIElimination wants. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56472 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-22Make log, log2, log10, exp, exp2 use Expand byDale Johannesen
default. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56471 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-22Mark several codegen passes as preserving all analysis.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56469 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-22More refactoring. Yawn.Dale Johannesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56468 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-22Refactor FP intrinisic setup. Per review feedback.Dale Johannesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56456 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-22Per review feedback: Only performEvan Cheng
(srl x, (trunc (and y, c))) -> (srl x, (and (trunc y), c)) etc. when both "trunc" and "and" have single uses. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56452 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-22Initial support for the CMake build system.Oscar Fuentes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56419 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-22Add helper function to get a 32-bit floating point constant. No ↵Bill Wendling
functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56418 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-21Factor out code into HandleVirtRegDef, for consistency withDan Gohman
Handle{Virt,Phys}Reg{Def,Use}. Remove a redundant check for register zero, and redundant checks for isPhysicalRegister. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56412 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-21Fetch the starting index of the block when assigning intervals. This gets ↵Owen Anderson
live-in indices correct in the presence of things like EH labels. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56410 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-21don't print GlobalAddressSDNode's with an offset of zero as "foo0".Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56399 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-20Teach coalescer about earlyclobber bits.Dale Johannesen
Check bits for preferred register. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56384 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-20Fix PR2808. When regalloc runs out of register, it spill a physical register ↵Evan Cheng
around the live interval being allocated. Do not continue to try to spill another register, just grab the physical register and move on. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56381 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-19Continue after removing the current MI.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56372 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-19Refactor X86SelectConstAddr, folding it into X86SelectAddress. ThisDan Gohman
results in better code for globals. Also, unbreak the local CSE for GlobalValue stub loads. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56371 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-19Make earlyclobber stuff work when virtual regsDale Johannesen
have previously been assigned conflicting physreg. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56364 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-19Re-materalized definition instructions may be dead. Whack them.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56352 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-19Remove AsmThatEarlyClobber etc. from LiveIntervalAnalysisDale Johannesen
and redo as linked list walk. Logic moved into RA. Per review feedback. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56326 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-18Somehow RegAllocLinearScan is keeping two pointers to MachineRegisterInfo.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56314 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-18Don't consider instructions with implicit physical registerDan Gohman
defs to be necessarily live. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56310 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-18Add a new "fast" scheduler. This is currently basically just aDan Gohman
copy of the BURRList scheduler, but with several parts ripped out, such as backtracking, online topological sort maintenance (needed by backtracking), the priority queue, and Sethi-Ullman number computation and maintenance (needed by the priority queue). As a result of all this, it generates somewhat lower quality code, but that's its tradeoff for running about 30% faster than list-burr in -fast mode in many cases. This is somewhat experimental. Moving forward, major pieces of this can be refactored with pieces in common with ScheduleDAGRRList.cpp. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56307 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-17Add a bit to mark operands of asm's that conflictDale Johannesen
with an earlyclobber operand elsewhere. Propagate this bit and the earlyclobber bit through SDISel. Change linear-scan RA not to allocate regs in a way that conflicts with an earlyclobber. See also comments. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56290 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-17Unallocatable registers do not have live intervals.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56287 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-17Don't worry about clobbering physical register defs that aren't used.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56281 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-17Add a new MachineInstr-level DCE pass. It is very simple, and is intended toDan Gohman
be used with fast-isel. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56268 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-16When converting a CopyFromReg to a copy instruction, use the register class ↵Evan Cheng
of its uses to determine the right destination register class of the copy. This is important for targets where a physical register may belong to multiple register classes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56258 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-16Change SelectionDAG::getConstantPool to always set the alignment of theDan Gohman
ConstantPoolSDNode, using the target's preferred alignment for the constant type. In LegalizeDAG, when performing loads from the constant pool, the ConstantPoolSDNode's alignment is used in the calls to getLoad and getExtLoad. This change prevents SelectionDAG::getLoad/getExtLoad from incorrectly choosing the ABI alignment for constant pool loads when Alignment == 0. The incorrect alignment is only a performance issue when ABI alignment does not equal preferred alignment (i.e., on x86 it was generating MOVUPS instead of MOVAPS for v4f32 constant loads when the default ABI alignment for 128bit vectors is forced to 1 byte.) Patch by Paul Redmond! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56253 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-16Reverting r56249. On further investigation, this functionality isn't needed.Bill Wendling
Apologies for the thrashing. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56251 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-16Include the alignment value when displaying ConstantPoolSDNodes.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56250 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-16- Change "ExternalSymbolSDNode" to "SymbolSDNode".Bill Wendling
- Add linkage to SymbolSDNode (default to external). - Change ISD::ExternalSymbol to ISD::Symbol. - Change ISD::TargetExternalSymbol to ISD::TargetSymbol These changes pave the way to allowing SymbolSDNodes with non-external linkage. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56249 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-16Fix these comments to reflect current reality. Surprisingly,Dan Gohman
MachineConstantPool::getConstantPoolIndex actually expects a log2-encoded alignment. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56248 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-16Don't take the time to CheckDAGForTailCallsAndFixThem when tail callsDan Gohman
are not enabled. Instead just omit the tail call flag when calls are created. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56235 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-15Live intervals for live-in registers should begin at the beginning of a ↵Owen Anderson
basic block, not at the first instruction. Also, their valno's should have an unknown def. This has no effect currently, but was causing issues when StrongPHIElimination was enabled. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56231 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-15Re-enable SelectionDAG CSE for calls. It matters in the case ofDan Gohman
libcalls, as in this testcase on ARM. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56226 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-15Correctly update kill infos after extending a live range and merge 2 val#'s; ↵Evan Cheng
fix 56165 - do not mark val# copy field if the copy does not define the val#. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56199 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-14adjust last patch per review feedbackDale Johannesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56194 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-13Remove isImm(), isReg(), and friends, in favor of Dan Gohman
isImmediate(), isRegister(), and friends, to avoid confusion about having two different names with the same meaning. I'm not attached to the longer names, and would be ok with changing to the shorter names if others prefer it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56189 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-13Define CallSDNode, an SDNode subclass for use with ISD::CALL.Dan Gohman
Currently it just holds the calling convention and flags for isVarArgs and isTailCall. And it has several utility methods, which eliminate magic 5+2*i and similar index computations in several places. CallSDNodes are not CSE'd. Teach UpdateNodeOperands to handle nodes that are not CSE'd gracefully. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56183 91177308-0d34-0410-b5e6-96231b3b80d8
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