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AgeCommit message (Expand)Author
2012-05-17whitespaceAndrew Trick
2012-05-17Never clear <undef> flags on already joined copies.Jakob Stoklund Olesen
2012-05-17Fix a verifier bug.Jakob Stoklund Olesen
2012-05-17Relax the requirement that the exception object must be an instruction. DuringBill Wendling
2012-05-17SelectionDAGBuilder: CaseBlock, CaseRanges and CaseCmp changed representation...Stepan Dyatkovskiy
2012-05-16Set sub-register <undef> flags more accurately.Jakob Stoklund Olesen
2012-05-16Fix a thinko in DisintegrateMERGE_VALUES. Patch by Xiaoyi Guo.Duncan Sands
2012-05-15Enable sub-sub-register copy coalescing.Jakob Stoklund Olesen
2012-05-15Teach RegisterCoalescer to handle symmetric sub-register copies.Jakob Stoklund Olesen
2012-05-15Handle NewReg==OldReg in renameRegister().Jakob Stoklund Olesen
2012-05-15We never call adjustCopiesBackFrom() for partial copies.Jakob Stoklund Olesen
2012-05-15Extend the CoalescerPair interface to handle symmetric sub-register copies.Jakob Stoklund Olesen
2012-05-15Add -enable-aa-sched-mi, off by default, for AliasAnalysis inside MachineSche...Andrew Trick
2012-05-15Allow MCCodeEmitter access to the target MCRegisterInfo.Jim Grosbach
2012-05-15Rejected r156804 due to buildbots failures.Stepan Dyatkovskiy
2012-05-15SelectionDAGBuilder::Clusterify : main functinality was replaced with CRSBuil...Stepan Dyatkovskiy
2012-05-14Don't access MO reference after invalidating operand list.Jakob Stoklund Olesen
2012-05-14Fix PR12821.Jakob Stoklund Olesen
2012-05-14Rename @llvm.debugger to @llvm.debugtrap.Dan Gohman
2012-05-12Don't look for empty live ranges in the unions.Jakob Stoklund Olesen
2012-05-11Revert 156658.Chad Rosier
2012-05-11[fast-isel] Fast-isel doesn't use the expect intrinsic.Chad Rosier
2012-05-11ARM: peephole optimization to remove cmp instructionManman Ren
2012-05-11Define a new intrinsic, @llvm.debugger. It will be similar to __builtin_trap(),Dan Gohman
2012-05-10misched: Print machineinstrs with -debug-only=mischedAndrew Trick
2012-05-10misched: tracing register pressure heuristics.Andrew Trick
2012-05-10misched: Add register pressure backoff to ConvergingScheduler.Andrew Trick
2012-05-10misched: Release only unscheduled nodes into ReadyQ.Andrew Trick
2012-05-10misched: Added ReadyQ container wrapper for Top and Bottom Queues.Andrew Trick
2012-05-10misched: Introducing Top and Bottom register pressure trackers during schedul...Andrew Trick
2012-05-10RegPressure: API for speculatively checking instruction pressure.Andrew Trick
2012-05-10RegPressure: fix array index iteration style.Andrew Trick
2012-05-10Revert: 156550 "ARM: peephole optimization to remove cmp instruction"Manman Ren
2012-05-10ARM: peephole optimization to remove cmp instructionManman Ren
2012-05-08Fix thinko in conditional.Eric Christopher
2012-05-08DAGCombiner should not change the type of an extract_vector index.Jim Grosbach
2012-05-08Formatting fixes.Akira Hatanaka
2012-05-08Handle OpDeref in case it comes in as a register operand.Eric Christopher
2012-05-08Extract methods for joining physregs.Jakob Stoklund Olesen
2012-05-07Naming convention and whitespace. No functional change.Jakob Stoklund Olesen
2012-05-07Coalesce subreg-subreg copies.Jakob Stoklund Olesen
2012-05-07Add an MF argument to TRI::getPointerRegClass() and TII::getRegClass().Jakob Stoklund Olesen
2012-05-07Teach DAG combine to fold x-x to 0.0 when unsafe FP math is enabled.Owen Anderson
2012-05-05Add a new target hook "predictableSelectIsExpensive".Benjamin Kramer
2012-05-04Make sure findRepresentativeClass picks the widest super-register.Jakob Stoklund Olesen
2012-05-04Remove extra comma in debug output.Jakob Stoklund Olesen
2012-05-04Use SuperRegClassIterator for findRepresentativeClass().Jakob Stoklund Olesen
2012-05-03Fix two-address pass's aggressive instruction commuting heuristics. It's meantEvan Cheng
2012-05-03Added TargetRegisterInfo::getAllocatableClass.Andrew Trick
2012-05-02Teach DAGCombine the same multiply-by-1.0 folding trick when doing FMAs, just...Owen Anderson
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