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2012-10-26Reduce indentation with early exit.Jakob Stoklund Olesen
No functional change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166829 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-26Also make the current basic block a class member.Jakob Stoklund Olesen
Don't pass it around everywhere as a function argument. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166828 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-26Make the Processed set a class member.Jakob Stoklund Olesen
Don't pass it everywhere as an argument. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166820 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-26Fix whitespace and function names to be coding standardy.Jakob Stoklund Olesen
No functional change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166814 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-26Remove the canCombineSubRegIndices() target hook.Jakob Stoklund Olesen
The new coalescer can already do all of this, so there is no need to duplicate the efforts. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166813 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-26Make sure I is not the end iterator when isInsideBundle is called. Akira Hatanaka
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166784 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-26Remove GC roots that reference dead objects.Nicolas Geoffray
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166763 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-26Fix typo in comment.Nick Lewycky
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166750 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-25Stop running the machine code verifier unconditionally.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166646 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-24Add some cleanup to the DataLayout changes requested by Chandler.Micah Villmow
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166607 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-24Back out r166591, not sure why this made it through since I cancelled the ↵Micah Villmow
command. Bleh, sorry about this! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166596 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-24Delete a directory that wasn't supposed to be checked in yet.Micah Villmow
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166591 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-24Add in support for getIntPtrType to get the pointer type based on the ↵Micah Villmow
address space. This checkin also adds in some tests that utilize these paths and updates some of the clients. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166578 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-24Teach DAG combine to fold (buildvec (Xint2fp x)) to (Xint2fp (buildvec x))Michael Liao
- If more than 1 elemennts are defined and target supports the vectorized conversion, use the vectorized one instead to reduce the strength on conversion operation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166546 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-24Keep coding standard. Don't evaluate getNumOperands() every time.Jakub Staszak
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166531 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-23Clean up code and put transformation on (build_vec (ext x)) into a helper funcMichael Liao
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166519 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-23Make the indirect branch optimization deterministic. No functionality change.Nadav Rotem
Patch by Daniel Reynaud. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166501 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-23Per the C++ standard, we need to include the definition of llvm::Calculate inRichard Smith
every TU where it's implicitly instantiated, even if there's an implicit instantiation for the same types available in another TU. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166470 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-21Don't crash when the Assignments vector is empty.Jakob Stoklund Olesen
Reported by Vincent Lejeune using an out-of-tree target. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166398 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-20Symbol hygiene: Make sure declarations and definitions match, make helper ↵Benjamin Kramer
functions static. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166376 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-191. Remove noreturn attribute from __builtin_debugtrap().Shuxin Yang
(The change at Clang side was committed in r166345) 2. Cosmetic change in order to conform to coding standards. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166350 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-19revert r166264 because the LTO build is still failingNadav Rotem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166340 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-19This patch is to fix radar://8426430. It is about llvm support of ↵Shuxin Yang
__builtin_debugtrap() which is supposed to consistently raise SIGTRAP across all systems. In contrast, __builtin_trap() behave differently on different systems. e.g. it raises SIGTRAP on ARM, and SIGILL on X86. The purpose of __builtin_debugtrap() is to consistently provide "trap" functionality, in the mean time preserve the compatibility with on gcc on __builtin_trap(). The X86 backend is already able to handle debugtrap(). This patch is to: 1) make front-end recognize "__builtin_debugtrap()" (emboddied in the one-line change to Clang). 2) In DAG legalization phase, by default, "debugtrap" will be replaced with "trap", which make the __builtin_debugtrap() "available" to all existing ports without the hassle of changing their code. 3) If trap-function is specified (via -trap-func=xyz to llc), both __builtin_debugtrap() and __builtin_trap() will be expanded into the function call of the specified trap function. This behavior may need change in the future. The provided testing-case is to make sure 2) and 3) are working for ARM port, and we already have a testing case for x86. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166300 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-19recommit the patch that makes LSR and LowerInvoke use the TargetTransform ↵Nadav Rotem
interface. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166264 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-19Simplify condition checking as CONCAT assume all inputs of the same type.Michael Liao
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166260 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-18Clear unknown mem ops when merging stack slots (pr14090)Sebastian Pop
When merging stack slots, if StackColoring::remapInstructions gets a value back from GetUnderlyingObject that it does not know about or is not itself a stack slot, clear the memory operand in case it aliases the merged slot. This prevents the introduction of incorrect aliasing information. Author: Matthew Curtis <mcurtis@codeaurora.org> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166216 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-18Change MachineFrameInfo::StackObject::Alloca from Value* to AllocaInst*Sebastian Pop
This more accurately reflects what is actually being stored in the field. No functionality change intended. Author: Matthew Curtis <mcurtis@codeaurora.org> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166215 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-18In SimplifySelectOps we pulled two loads through a select node despite the ↵Nadav Rotem
fact that one was dependent on the other. rdar://12513091 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166196 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-18Temporarily revert the TargetTransform changes.Bob Wilson
The TargetTransform changes are breaking LTO bootstraps of clang. I am working with Nadav to figure out the problem, but I am reverting it for now to get our buildbots working. This reverts svn commits: 165665 165669 165670 165786 165787 165997 and I have also reverted clang svn 165741 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166168 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-17Revert part of r166049 back and enable test case in r166125.Michael Liao
- Folding (trunc (concat ... X )) to (concat ... (trunc X) ...) is valid when '...' are all 'undef's. - r166125 relies on this transformation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166155 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-17Revert r166049Michael Liao
- In general, it's unsafe for this transformation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166135 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-17Teach DAG combine to fold (extract_subvec (concat v1, ..) i) to v_iMichael Liao
- If the extracted vector has the same type of all vectored being concatenated together, it should be simplified directly into v_i, where i is the index of the element being extracted. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166125 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-17Switch MRI::UsedPhysRegs to a register unit bit vector.Jakob Stoklund Olesen
This is a more compact, less redundant representation, and it avoids scanning long lists of aliases for ARM D-registers, for example. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166124 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-17Add a really faster pre-RA scheduler (-pre-RA-sched=linearize). It doesn't useEvan Cheng
any scheduling heuristics nor does it build up any scheduling data structure that other heuristics use. It essentially linearize by doing a DFA walk but it does handle glues correctly. IMPORTANT: it probably can't handle all the physical register dependencies so it's not suitable for x86. It also doesn't deal with dbg_value nodes right now so it's definitely is still WIP. rdar://12474515 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166122 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-17Merge MRI::isPhysRegOrOverlapUsed() into isPhysRegUsed().Jakob Stoklund Olesen
All callers of these functions really want the isPhysRegOrOverlapUsed() functionality which also checks aliases. For historical reasons, targets without register aliases were calling isPhysRegUsed() instead. Change isPhysRegUsed() to also check aliases, and switch all isPhysRegOrOverlapUsed() callers to isPhysRegUsed(). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166117 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-17misched: Better handling of invalid latencies in the machine modelAndrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166107 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-17Use a SparseSet instead of a BitVector for UsedInInstr in RAFast.Jakob Stoklund Olesen
This is just as fast, and it makes it possible to avoid leaking the UsedPhysRegs BitVector implementation through MachineRegisterInfo::addPhysRegsUsed(). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166083 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-16Avoid rematerializing a redef immediately after the old def.Jakob Stoklund Olesen
PR14098 contains an example where we would rematerialize a MOV8ri immediately after the original instruction: %vreg7:sub_8bit<def> = MOV8ri 9; GR32_ABCD:%vreg7 %vreg22:sub_8bit<def> = MOV8ri 9; GR32_ABCD:%vreg7 Besides being pointless, it is also wrong since the original instruction only redefines part of the register, and the value read by the new instruction is wrong. The problem was the LiveRangeEdit::allUsesAvailableAt() didn't special-case OrigIdx == UseIdx and found the wrong SSA value. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166068 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-16Revert r166046 "Switch back to the old coalescer for now to fix the 32 bit bit"Jakob Stoklund Olesen
A fix for PR14098, including the test case is in the next commit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166067 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-16Teach DAG combine to fold (trunc (fptoXi x)) to (fptoXi x)Michael Liao
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166049 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-16Switch back to the old coalescer for now to fix the 32 bit bitRafael Espindola
llvm+clang+compiler-rt bootstrap. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166046 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-16Issue:Stepan Dyatkovskiy
Stack is formed improperly for long structures passed as byval arguments for EABI mode. If we took AAPCS reference, we can found the next statements: A: "If the argument requires double-word alignment (8-byte), the NCRN (Next Core Register Number) is rounded up to the next even register number." (5.5 Parameter Passing, Stage C, C.3). B: "The alignment of an aggregate shall be the alignment of its most-aligned component." (4.3 Composite Types, 4.3.1 Aggregates). So if we have structure with doubles (9 double fields) and 3 Core unused registers (r1, r2, r3): caller should use r2 and r3 registers only. Currently r1,r2,r3 set is used, but it is invalid. Callee VA routine should also use r2 and r3 regs only. All is ok here. This behaviour is guessed by rounding up SP address with ADD+BFC operations. Fix: Main fix is in ARMTargetLowering::HandleByVal. If we detected AAPCS mode and 8 byte alignment, we waste odd registers then. P.S.: I also improved LDRB_POST_IMM regression test. Since ldrb instruction will not generated by current regression test after this patch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166018 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-16misched: Added handleMove support for updating all kill flags, not just for ↵Andrew Trick
allocatable regs. This is a medium term workaround until we have a more robust solution in the form of a register liveness utility for postRA passes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166001 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-16Remove unused BitVectors from getAllocatableSet().Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165999 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-15Remove RegisterClassInfo::isReserved() and isAllocatable().Jakob Stoklund Olesen
Clients can use the equivalent functions in MRI. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165990 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-15Remove LIS::isAllocatable() and isReserved() helpers.Jakob Stoklund Olesen
All callers can simply use the corresponding MRI functions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165985 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-15Switch most getReservedRegs() clients to the MRI equivalent.Jakob Stoklund Olesen
Using the cached bit vector in MRI avoids comstantly allocating and recomputing the reserved register bit vector. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165983 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-15Freeze the reserved registers as soon as isel is complete.Jakob Stoklund Olesen
Also provide an MRI::getReservedRegs() function to access the frozen register set, and isReserved() and isAllocatable() methods to test individual registers. The various implementations of TRI::getReservedRegs() are quite complicated, and many passes need to look at the reserved register set. This patch makes it possible for these passes to use the cached copy in MRI, avoiding a lot of malloc traffic and repeated calculations. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165982 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-15Move the Attributes::Builder outside of the Attributes class and into its ↵Bill Wendling
own class named AttrBuilder. No functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165960 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-15Make sure we iterate over newly created instructions. Fixes pr13625. Testcase toRafael Espindola
follow in one sec. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165951 91177308-0d34-0410-b5e6-96231b3b80d8
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