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2012-12-04Use dyn_cast instead of isa and cast. No functionality change.Jakub Staszak
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169196 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-04Remove VirtRegMap::getRegAllocPref().Jakob Stoklund Olesen
Now that there can be multiple hint registers from targets, it doesn't make sense to have a function that returns 'the' preferred register. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169190 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-04Use MRI::getSimpleHint() instead of getRegAllocPref() in remaining cases.Jakob Stoklund Olesen
Targets can provide multiple hints now, so getRegAllocPref() doesn't make sense any longer because it only returns one preferred register. Replace it with getSimpleHint() in the remaining heuristics. This function only git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169188 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-04Stack Alignment: move functions from header file MachineFrameInfo.h.Manman Ren
No functional change for this commit. The follow-up patch will add more stuff to these functions. rdar://12713765 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169186 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-03Add VirtRegMap::hasKnownPreference().Jakob Stoklund Olesen
Virtual registers with a known preferred register are prioritized by RAGreedy. This function makes the condition explicit without depending on getRegAllocPref(). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169179 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-03Use the new getRegAllocationHints() hook from AllocationOrder.Jakob Stoklund Olesen
This simplifies the hinting code quite a bit while making the targets easier to write at the same time. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169173 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-03moves doInitialization and doFinalization to the Pass class and removes some ↵Pedro Artigas
unreachable code in MachineModuleInfo reviewed by Evan Cheng <evan.cheng@apple.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169164 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-03Add a new hook for providing register allocator hints more flexibly.Jakob Stoklund Olesen
The TargetRegisterInfo::getRegAllocationHints() function is going to replace the existing mechanisms for providing target-dependent hints to the register allocator: ResolveRegAllocHint() and getRawAllocationOrder(). The new hook is more flexible because it allows the target to provide multiple preferred candidate registers for each virtual register, and it is easier to use because targets are not required to return a reference to a constant array like getRawAllocationOrder(). An optional VirtRegMap argument can be used to provide target-dependent hints that depend on the provisional assignments of other virtual registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169154 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-03Fix PR12942: Allow two CUs to be generated from the same source file.Eli Bendersky
Thanks Eric for the review. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169142 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-03Use the new script to sort the includes of every file under lib.Chandler Carruth
Sooooo many of these had incorrect or strange main module includes. I have manually inspected all of these, and fixed the main module include to be the nearest plausible thing I could find. If you own or care about any of these source files, I encourage you to take some time and check that these edits were sensible. I can't have broken anything (I strictly added headers, and reordered them, never removed), but they may not be the headers you'd really like to identify as containing the API being implemented. Many forward declarations and missing includes were added to a header files to allow them to parse cleanly when included first. The main module rule does in fact have its merits. =] git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169131 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-02Allow merging multiple store sequences on the same chain.Nadav Rotem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169111 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-01misched: Fix RegisterPressureTracker handling of DebugVals.Andrew Trick
Assertion failed: (TopRPTracker.getPos() == RegionBegin && "bad initial Top tracker"). rdar://12790302. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169072 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-01misched: Fix the DAG builder to handle an undef operand at ExitSU.Andrew Trick
Assertion failed: (VNI && "No value to read by operand") rdar://12790267. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169071 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-01misched: Fix LiveInterval update to better handle DebugVal.Andrew Trick
Assertion failed: (itr != mi2iMap.end() && "Instruction not found in maps.") rdar://12777252. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169070 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-01misched: fix RegionBegin when DebugValues get shuffled to the top.Andrew Trick
assert (RemainingInstrs == 0 && "Instruction count mismatch!") rdar://12776937. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169069 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-01Simplify REG_SEQUENCE lowering.Jakob Stoklund Olesen
The TwoAddressInstructionPass takes the machine code out of SSA form by expanding REG_SEQUENCE instructions into copies. It is no longer necessary to rewrite the registers used by a REG_SEQUENCE instruction because the new coalescer algorithm can do it now. REG_SEQUENCE is just converted to a sequence of sub-register copies now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169067 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-30Add some first skeleton work for the DWARF5 Fission proposal. EmitEric Christopher
part of the compile unit CU and start separating out information into the various sections that will be pulled out later. WIP. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169061 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-30Convert COPY instructions into KILLs if they have implicit defs.Jakob Stoklund Olesen
MachineCopyPropagation doesn't understand super-register liveness well enough to be able to remove implicit defs of super-registers. This fixes a problem in ARM/2012-01-26-CopyPropKills.ll that is exposed by an future TwoAddressInstructionPass change. The KILL instructions are removed before the machine code is emitted. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169060 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-30Replace r168930 with a more reasonable patch.Bill Wendling
The original patch removed a bunch of code that the SjLjEHPrepare pass placed into the entry block if all of the landing pads were removed during the CodeGenPrepare class. The more natural way of doing things is to run the CGP *before* we run the SjLjEHPrepare pass. Make it so! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169044 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-29More comment.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168952 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-29Cleanup recent addition of DAGTypeLegalizer::SplitVecOp_VSELECTJustin Holewinski
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168932 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-29misched: Recompute priority queue when DFSResults are updated.Benjamin Kramer
This was found by MSVC10's STL debug mode on a test from the test suite. Sadly std::is_heap isn't standard so there is no way to assert this without writing our own heap verify, which looks like overkill to me. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168885 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-29Teach the legalizer how to handle operands for VSELECT nodesJustin Holewinski
If we need to split the operand of a VSELECT, it must be the mask operand. We split the entire VSELECT operand with EXTRACT_SUBVECTOR. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168883 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-29Allow targets to prefer TypeSplitVector over TypePromoteInteger when ↵Justin Holewinski
computing the legalization method for vectors For some targets, it is desirable to prefer scalarizing <N x i1> instead of promoting to a larger legal type, such as <N x i32>. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168882 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-29Use MCPhysReg for RegisterClassInfo allocation orders.Jakob Stoklund Olesen
This saves a bit of memory. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168852 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-29Avoid rewriting instructions twice.Jakob Stoklund Olesen
This could cause miscompilations in targets where sub-register composition is not always idempotent (ARM). <rdar://problem/12758887> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168837 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-29When combining consecutive stores allow loads in between the stores, if the ↵Nadav Rotem
loads do not alias. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168832 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-28Make the LiveRegMatrix analysis available to targets.Jakob Stoklund Olesen
No functional change, just moved header files. Targets can inject custom passes between register allocation and rewriting. This makes it possible to tweak the register allocation before rewriting, using the full global interference checking available from LiveRegMatrix. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168806 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-28misched: Analysis that partitions the DAG into subtrees.Andrew Trick
This is a simple, cheap infrastructure for analyzing the shape of a DAG. It recognizes uniform DAGs that take the shape of bottom-up subtrees, such as the included matrix multiplication example. This is useful for heuristics that balance register pressure with ILP. Two canonical expressions of the heuristic are implemented in scheduling modes: -misched-ilpmin and -misched-ilpmax. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168773 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-28misched: rename ScheduleDAGILP to ScheduleDFS to prepare for other heuristics.Andrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168772 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-28misched: better alias analysis.Andrew Trick
This fixes a hole in the "cheap" alias analysis logic implemented within the DAG builder itself, regardless of whether proper alias analysis is enabled. It now handles this pattern produced by LSR+CodeGenPrepare. %sunkaddr1 = ptrtoint * %obj to i64 %sunkaddr2 = add i64 %sunkaddr1, %lsr.iv %sunkaddr3 = inttoptr i64 %sunkaddr2 to i32* store i32 %v, i32* %sunkaddr3 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168768 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-28misched: Debug output fix. Use an always valid iterator.Andrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168767 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-28Move the guts of TargetInstrInfoImpl into the TargetInstrInfo class.Jakob Stoklund Olesen
The *Impl class no longer serves a purpose now that the super-class implementation is in CodeGen. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168759 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-28Move Target{Instr,Register}Info.cpp into lib/CodeGen.Jakob Stoklund Olesen
The Target library is not allowed to depend on the large CodeGen library, but the TRI and TII classes provide abstract interfaces that require both caller and callee to link to CodeGen. The implementation files for these classes provide default implementations of some of the hooks. These methods may need to reference CodeGen, so they belong in that library. We already have a number of methods implemented in the TargetInstrInfoImpl sub-class because of that. I will merge that class into the parent next. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168758 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-28Revert r168630, r168631, and r168633 as these are causing nightly test failures.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168751 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-27Attempt to make the comments for dwarf debug look more likeEric Christopher
the coding standard would like. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168737 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-27Reapply section moving, make sure string section is output last.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168736 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-27CSE: allow PerformTrivialCoalescing to check copies across basic blockManman Ren
boundaries. Given the following case: BB0 %vreg1<def> = SUBrr %vreg0, %vreg7 %vreg2<def> = COPY %vreg7 BB1 %vreg10<def> = SUBrr %vreg0, %vreg2 We should be able to CSE between SUBrr in BB0 and SUBrr in BB1. rdar://12462006 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168717 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-27Remove duplicated #includes.Jakub Staszak
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168712 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-27Never use .lcomm on platforms where it does not accept an alignmentUlrich Weigand
argument. Instead, use a pair of .local and .comm directives. This avoids spurious differences between binaries built by the integrated assembler vs. those built by the external assembler, since the external assembler may impose alignment requirements on .lcomm symbols where the integrated assembler does not. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168704 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-27Revert rearrangement of debug info sections to unblock the botsEric Christopher
and O0 + debug codegen. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168680 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-27Remove unneeded #include.Jakub Staszak
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168670 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-27Remove unneeded #include.Jakub Staszak
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168664 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-27llvm/CodeGen: Remove empty files in r168659.NAKAMURA Takumi
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168663 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-27Remove unused forward declaration.Jakub Staszak
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168660 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-27Remove unused MachineLoopRanges analysis.Jakub Staszak
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168659 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-27Make comment names match function names.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168644 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-27Add in sections for the fission case (no change so incorrect) andEric Christopher
add a TODO for starting. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168643 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-27Reorder section output ordering.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168638 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-27Whitespace cleanup.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168637 91177308-0d34-0410-b5e6-96231b3b80d8
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