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git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_29@127437 91177308-0d34-0410-b5e6-96231b3b80d8
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--- Merging r127350 into '.':
D test/CodeGen/X86/2009-03-11-CoalescerBug.ll
--- Merging r127351 into '.':
A test/CodeGen/X86/2011-03-09-Physreg-Coalescing.ll
U test/CodeGen/X86/fold-pcmpeqd-2.ll
U lib/CodeGen/SimpleRegisterCoalescing.cpp
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Fix the build for MSVC 9 whose upper_bound() wants to compare elements in the
sorted array.
Patch by Olaf Krzikalla!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_29@127273 91177308-0d34-0410-b5e6-96231b3b80d8
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This change uses the MaxReorderWindow for both height and depth, which
tends to limit the negative effects of high register pressure.
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In this case, the value need to be available at the load index instead of the
normal use index.
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type.
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current implementation of -pre-RA-sched=list-ilp.
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mode".
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The coalescer can in very rare cases leave too large live intervals around after
rematerializing cheap-as-a-move instructions.
Linear scan doesn't really care, but live range splitting gets very confused
when a live range is killed by a ghost instruction.
I will fix this properly in the coalescer after 2.9 branches.
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regs. This is the only change in this checkin that may affects the
default scheduler. With better register tracking and heuristics, it
doesn't make sense to artificially lower the register limit so much.
Added -sched-high-latency-cycles and X86InstrInfo::isHighLatencyDef to
give the scheduler a way to account for div and sqrt on targets that
don't have an itinerary. It is currently defaults to 10 (the actual
number doesn't matter much), but only takes effect on non-default
schedulers: list-hybrid and list-ilp.
Added several heuristics that can be individually disabled for the
non-default sched=list-ilp mode. This helps us determine how much
better we can do on a given benchmark than the default
scheduler. Certain compute intensive loops run much faster in this
mode with the right set of heuristics, and it doesn't seem to have
much negative impact elsewhere. Not all of the heuristics are needed,
but we still need to experiment to decide which should be disabled by
default for sched=list-ilp.
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The global cost is the sum of block frequencies for spill code that must be
inserted because preferences weren't met.
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pattern.
This simplifies the code and makes it faster too.
The interference patterns are saved for each candidate register. It will be
reused for actually executing the split. Work in progress.
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free register.
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It gives better results. Sometimes, a live range can be large and still have
high spill weight. Such a range should not be spilled.
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Initially, slot indexes are quad-spaced. There is room for inserting up to 3
new instructions between the original instructions.
When we run out of indexes between two instructions, renumber locally using
double-spaced indexes. The original quad-spacing means that we catch up quickly,
and we only have to renumber a handful of instructions to get a monotonic
sequence. This is much faster than renumbering the whole function as we did
before.
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instruction.
You can't really predict how many indexes will be needed from the number of
defs, so let's keep it simple.
Also remove an extra empty index that was inserted after each basic block. It
was intended for live-out ranges, but it was never used that way.
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correct
type after type legalization has completed. Before then it may simply not be big
enough to hold the shift amount, particularly on x86 which uses a very small type
for shifts (this issue broke stuff in the past which is why LegalizeTypes carefully
uses a large type for shift amounts).
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Fix the PendingQueue, then disable it because it's not required for
the current schedulers' heuristics.
Fix the logic for the unused list-ilp scheduler.
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This speeds up updateSSA() so it only accounts for 5% of the live range
splitting time.
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it. It's been assumed up til now that it would be in its immediate
successor. However, this isn't necessarily the case. It could be in one of its
successor's successors.
Modify the code to more thoroughly check for an 'eh.selector' call in
successors. It only looks at a successor if we get there as a result of an
unconditional branch.
Testcase ObjC/exceptions-4.m in r126968.
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Add comment.
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does the function have at source level. If we need more space, just resize vector conservatively. This vector is only used once per function.
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be next to the frame pointer or the stack pointer.
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of defs.
There are probably much larger speedups to be had by renumbering locally instead
of looping over the whole function. For now, the greedy register allocator is
25% faster.
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This is much faster than using a pointer to a ManagedStatic object accessed with
a function call. The greedy register allocator is 5% faster overall just from
the SlotIndex default constructor savings.
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The SlotIndex created by the default construction does not represent a position
in the function, and it doesn't make sense to compare it to other indexes.
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time.
This speeds up the greedy register allocator by 15%.
DenseMap is not as fast as one might hope.
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multiple splits.
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When only a single value has been seen, new PHIDefs are never needed.
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We need to wait until we meet a PHIDef in its defining block before resurrecting
PHIKills in the predecessors.
This should unbreak the llvm-gcc-build-x86_64-darwin10-x-mingw32-x-armeabi bot.
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David Greene changed CannotYetSelect() to print the full DAG including multiple
copies of operands reached through different paths in the DAG. Unfortunately
this blows up exponentially in some cases. The depth limit of 100 is way too
high to prevent this -- I'm seeing a message string of 150MB with a depth of
only 40 in one particularly bad case, even though the DAG has less than 200
nodes. Part of the problem is that the printing code is following chain
operands, so if you fail to select an operation with a chain, the printer will
follow all the chained operations back to the entry node.
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No functional change.
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Values that map to a single new value in a new interval after splitting don't
need new PHIDefs, and if the parent value was never rematerialized the live
range will be the same.
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