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2009-05-03In some rare cases, the register allocator can spill registers but end up ↵Evan Cheng
not utilizing registers at all. The fundamental problem is linearscan's backtracking can end up freeing more than one allocated registers. However, reloads and restores might be folded into uses / defs and freed registers might not be used at all. VirtRegMap keeps track of allocations so it knows what's not used. As a horrible hack, the stack coloring can color spill slots with *free* registers. That is, it replace reload and spills with copies from and to the free register. It unfold instructions that load and store the spill slot and replace them with register using variants. Not yet enabled. This is part 1. More coming. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70787 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03Fix typoAnton Korobeynikov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70770 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03Properly handle sdiv / udiv / srem / urem libcallsAnton Korobeynikov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70764 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03Proper name 16 bit libcallsAnton Korobeynikov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70750 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03Add libcall expansion for 16 and 128 bit mulsAnton Korobeynikov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70749 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-03-Move the DwarfWriter::ValidDebugInfo check to a static ↵Argyrios Kyrtzidis
DIDescriptor::ValidDebugInfo -Create DebugLocs without the need to have a DwarfWriter around git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70682 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-01Allow CONCAT_VECTORS nodes to be legal or have custom lowering for some targets.Bob Wilson
Changes to take advantage of this will come later. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70560 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-01Simplify more code and add timer stuff.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70539 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-01Simplify more code.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70537 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-01Simplify some code.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70534 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-01Fix whitespace. It was confusing me.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70533 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-01Code clean up. Bye bye PhysRegTracker.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70524 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-30Make DebugLoc independent of DwarfWriter.Argyrios Kyrtzidis
-Replace DebugLocTuple's Source ID with CompileUnit's GlobalVariable* -Remove DwarfWriter::getOrCreateSourceID -Make necessary changes for the above (fix callsites, etc.) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70520 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-30Join cross class copies using getCommonSubClass()Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70513 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-30Add a smarter heuristic to determine when to coalesce a virtual register ↵Evan Cheng
with a physical one. More specifically, it avoid tying a virtual register in the loop with a physical register defined / used outside the loop. When it determines it's not profitable, it will use the physical register as the allocation preference instead. This is *not* turned on by default. Testing indicates this is just as likely to pessimize code. The main issue seems to be allocation preference doesn't work effectively. That will change once I've taught register allocator "swapping". git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70503 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-30Move helper functions for optimizing division by constant into the APIntJay Foad
class. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70488 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-30fix a regression handling indirect results: these need to be consideredChris Lattner
memory operands otherwise the writebacks get lost when the inline asm doesn't otherwise have side effects. This fixes rdar://6839427, though clang really shouldn't generate these anymore. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70455 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-29Instead of passing in an unsigned value for the optimization level, use an enum,Bill Wendling
which better identifies what the optimization is doing. And is more flexible for future uses. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70440 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-29Fix infinite recursion in the C++ code which handles movddup by making it ↵Nate Begeman
unnecessary. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70425 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-29MachineInstr::isRegTiedTo{Use,Def}Operand can safely be made const.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70408 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-29Update comment, replace theoretically impossible check with an assert.Nate Begeman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70391 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-29spillPhysRegAroundRegDefsUses() may have invalidated iterators stored in ↵Evan Cheng
fixed_ IntervalPtrs. Reset them. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70378 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-29Implement review feedback for vector shuffle work.Nate Begeman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70372 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-29Add a public method called getAddressSpace() to the GlobalAddressSDNode.Sanjiv Gupta
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70366 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-29Disable the load-shrinking optimization from looking atChris Lattner
anything larger than 64-bits, avoiding a crash. This should really be fixed to use APInts, though type legalization happens to help us out and we get good code on the attached testcase at least. This fixes rdar://6836460 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70360 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-29Determine allocation 'preference' with right register class. I haven't seen ↵Evan Cheng
this changing codegen so no test case. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70351 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-29Second attempt:Bill Wendling
Massive check in. This changes the "-fast" flag to "-O#" in llc. If you want to use the old behavior, the flag is -O0. This change allows for finer-grained control over which optimizations are run at different -O levels. Most of this work was pretty mechanical. The majority of the fixes came from verifying that a "fast" variable wasn't used anymore. The JIT still uses a "Fast" flag. I'll change the JIT with a follow-up patch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70343 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-28Move getMatchingSuperReg() out of coalescer and into TargetRegisterInfo.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70309 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-28Don't coalesce a physical register with an incompatible virtual register.Jakob Stoklund Olesen
If the physical register does not belong to the virtual register's regclass, don't coalesce. The physical register could be an invalid operand for an instruction using the vreg. The regclass matching is done after determining the actual subregisters being copied. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70298 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-28Initialized arrays can be in any address space.Sanjiv Gupta
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70297 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-28Move getSubRegisterRegClass from ScheduleDagSDNodesEmit.cpp to a ↵Jakob Stoklund Olesen
TargetRegisterClass method. Also make the method non-asserting. It will return NULL when given an invalid subreg index. The method is needed by an upcoming patch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70296 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-28Fix PR4034. Bug in LiveInterval::join when it's compacting new valno's.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70291 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-28Fix for PR4051. When 2address pass delete an instruction, update kill info ↵Evan Cheng
when necessary. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70279 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-28r70270 isn't ready yet. Back this out. Sorry for the noise.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70275 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-28Massive check in. This changes the "-fast" flag to "-O#" in llc. If you want toBill Wendling
use the old behavior, the flag is -O0. This change allows for finer-grained control over which optimizations are run at different -O levels. Most of this work was pretty mechanical. The majority of the fixes came from verifying that a "fast" variable wasn't used anymore. The JIT still uses a "Fast" flag. I'm not 100% sure if it's necessary to change it there... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70270 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-27Fix PR4076. Correctly create live interval of physical register with ↵Evan Cheng
two-address update. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70245 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-27Don't skip the CopyMI when removing kill markers.Owen Anderson
This should have no effect on generated code, but makes the intermediate state of the coalescer more sane. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70238 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-27Now that PR2957 is resolved, remove a bunch ofDuncan Sands
no-longer needed workarounds. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70234 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-272nd attempt, fixing SSE4.1 issues and implementing feedback from duncan.Nate Begeman
PR2957 ISD::VECTOR_SHUFFLE now stores an array of integers representing the shuffle mask internal to the node, rather than taking a BUILD_VECTOR of ConstantSDNodes as the shuffle mask. A value of -1 represents UNDEF. In addition to eliminating the creation of illegal BUILD_VECTORS just to represent shuffle masks, we are better about canonicalizing the shuffle mask, resulting in substantially better code for some classes of shuffles. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70225 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-27Fix PR4056. It's possible a physical register def is dead if its implicit ↵Evan Cheng
use is deleted by two-address pass. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70213 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-27Also delete last unused val#.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70212 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-27When transforming sext(trunc(load(x))) into sext(smaller load(x)),Dan Gohman
the trunc is directly replaced with the smaller load, so don't try to create a new sext node. This fixes PR4050. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70179 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-25Reuse unused val#'s to avoid running out of memory in extreme cases.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70069 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-25Refactor the code to grab the low and high parts of a valueDan Gohman
using EXTRACT_ELEMENT into a utility function. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70056 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-25Add a top-level comment about DAGCombiner's role in the compiler.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70052 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-25Do not share a single unknown val# for all the live ranges merged into a ↵Evan Cheng
physical sub-register live interval. When coalescer is merging in clobbered virtaul register live interval into a physical register live interval, give each virtual register val# a separate val# in the physical register live interval. Otherwise, the coalescer would have lost track of the definitions information it needs to make correct coalescing decisions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70026 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-24Fix PR 4057, a crash doing float->char const folding.Dale Johannesen
This particular one is undefined behavior (although this isn't related to the crash), so it will no longer do it at compile time, which seems better. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69990 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-24Revert 69952. Causes testsuite failures on linux x86-64.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69967 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-24PR2957Nate Begeman
ISD::VECTOR_SHUFFLE now stores an array of integers representing the shuffle mask internal to the node, rather than taking a BUILD_VECTOR of ConstantSDNodes as the shuffle mask. A value of -1 represents UNDEF. In addition to eliminating the creation of illegal BUILD_VECTORS just to represent shuffle masks, we are better about canonicalizing the shuffle mask, resulting in substantially better code for some classes of shuffles. A clean up of x86 shuffle code, and some canonicalizing in DAGCombiner is next. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69952 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-24Instead of requiring TLI.LowerCallTo to return an ISD::BUILD_PAIR,Dan Gohman
use ISD::EXTRACT_ELEMENT. SelectionDAG has a special fast-path for the cast of an EXTRACT_ELEMENT with a BUILD_PAIR operand, for the common case. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69948 91177308-0d34-0410-b5e6-96231b3b80d8
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