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path: root/lib/CodeGen/TwoAddressInstructionPass.cpp
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2010-05-17Fix PR7156. If the sources of a REG_SEQUENCE are all IMPLICIT_DEF's. Replace ↵Evan Cheng
it with an IMPLICIT_DEF rather than deleting it or else it would be left without a def. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103984 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-17Careful with reg_sequence coalescing to not to overwrite sub-register indices.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103971 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-14Teach two-address pass to do some coalescing while eliminating REG_SEQUENCEEvan Cheng
instructions. e.g. %reg1026<def> = VLDMQ %reg1025<kill>, 260, pred:14, pred:%reg0 %reg1027<def> = EXTRACT_SUBREG %reg1026, 6 %reg1028<def> = EXTRACT_SUBREG %reg1026<kill>, 5 ... %reg1029<def> = REG_SEQUENCE %reg1028<kill>, 5, %reg1027<kill>, 6, %reg1028, 7, %reg1027, 8, %reg1028, 9, %reg1027, 10, %reg1030<kill>, 11, %reg1032<kill>, 12 After REG_SEQUENCE is eliminated, we are left with: %reg1026<def> = VLDMQ %reg1025<kill>, 260, pred:14, pred:%reg0 %reg1029:6<def> = EXTRACT_SUBREG %reg1026, 6 %reg1029:5<def> = EXTRACT_SUBREG %reg1026<kill>, 5 The regular coalescer will not be able to coalesce reg1026 and reg1029 because it doesn't know how to combine sub-register indices 5 and 6. Now 2-address pass will consult the target whether sub-registers 5 and 6 of reg1026 can be combined to into a larger sub-register (or combined to be reg1026 itself as is the case here). If it is possible, it will be able to replace references of reg1026 with reg1029 + the larger sub-register index. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103835 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-13If REG_SEQUENCE source is livein, copy it first. Also, update livevariables ↵Evan Cheng
information when a copy is introduced. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103680 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-12Code clean up.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103538 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-11Ensure REG_SEQUENCE source operands are unique.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103449 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-10Clear RegSequences vector after eliminating REG_SEQUENCE instructions.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103435 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-06Add a DebugLoc argument to TargetInstrInfo::copyRegToReg, so that itDan Gohman
doesn't have to guess. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103194 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-05Move REG_SEQUENCE removal to 2addr pass.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103109 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-23Ignore dbg_value's.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99321 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-03Add MachineRegisterInfo::hasOneUse and hasOneNonDBGUse.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97663 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-02Swap parameters of isSafeToMove and isSafeToReMat for consistency.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97578 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-11Don't allow DBG_VALUE to affect codegen.Dale Johannesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95889 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-10Skip debug info in a couple of places.Dale Johannesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95814 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-09move target-independent opcodes out of TargetInstrInfoChris Lattner
into TargetOpcodes.h. #include the new TargetOpcodes.h into MachineInstr. Add new inline accessors (like isPHI()) to MachineInstr, and start using them throughout the codebase. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95687 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-09Skip DEBUG_VALUE in some places where it was affecting codegen.Dale Johannesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95647 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-05Change errs() to dbgs().David Greene
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92565 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-03improve portability to avoid conflicting with std::next in c++'0x.Chris Lattner
Patch by Howard Hinnant! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90365 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-18Fix PR5300.Jakob Stoklund Olesen
When TwoAddressInstructionPass deletes a dead instruction, make sure that all register kills are accounted for. The 2-addr register does not get special treatment. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89246 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-14- Change TargetInstrInfo::reMaterialize to pass in TargetRegisterInfo.Evan Cheng
- If destination is a physical register and it has a subreg index, use the sub-register instead. This fixes PR5423. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88745 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-25Remove includes of Support/Compiler.h that are no longer needed after theNick Lewycky
VISIBILITY_HIDDEN removal. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85043 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-25Remove VISIBILITY_HIDDEN from class/struct found inside anonymous namespaces.Nick Lewycky
Chris claims we should never have visibility_hidden inside any .cpp file but that's still not true even after this commit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85042 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-09Factor out LiveIntervalAnalysis' code to determine whether an instructionDan Gohman
is trivially rematerializable and integrate it into TargetInstrInfo::isTriviallyReMaterializable. This way, all places that need to know whether an instruction is rematerializable will get the same answer. This enables the useful parts of the aggressive-remat option by default -- using AliasAnalysis to determine whether a memory location is invariant, and removes the questionable parts -- rematting operations with virtual register inputs that may not be live everywhere. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83687 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-03Overhaul the TwoAddressInstructionPass to simplify the logic, especiallyBob Wilson
for the complicated case where one register is tied to multiple destinations. This avoids the extra scan of instruction operands that was introduced by my recent change. I also pulled some code out into a separate TryInstructionTransform method, added more comments, and renamed some variables. Besides all those changes, this takes care of a FIXME in the code regarding an assumption about there being a single tied use of a register when converting to a 3-address form. I'm not aware of cases where that assumption is violated, but the code now only attempts to transform an instruction, either by commuting its operands or by converting to a 3-address form, for the simple case where there is a single pair of tied operands. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80945 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-02Rearrange code to eliminate redundancy and avoid gotos.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80798 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-01Avoid calling removeVirtualRegisterKilled which iterates over the operandsBob Wilson
to find the kill, since we already have the operand. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80736 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-01Refactor some code into separate functions. No functional changes.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80733 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-01Move use of LV inside condition that guards for null LV.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80731 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-01Fix pr4843: When an instruction has multiple destination registers that areBob Wilson
tied to different source registers, the TwoAddressInstructionPass needs to be smarter. Change it to check before replacing a source register whether that source register is tied to a different destination register, and if so, defer handling it until a subsequent iteration. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80654 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-31Use early exit and reduce indentation.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80631 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-31If the tied registers are already the same, there is no need to changeBob Wilson
them. Move the code to make that change inside the conditional. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80630 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-23remove some DOUTsChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79812 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-07Code clean up.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78360 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-31Use setPreservesAll and setPreservesCFG in CodeGen passes.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77754 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-25More migration to raw_ostream, the water has dried up around the iostream hole.Daniel Dunbar
- Some clients which used DOUT have moved to DEBUG. We are deprecating the "magic" DOUT behavior which avoided calling printing functions when the statement was disabled. In addition to being unnecessary magic, it had the downside of leaving code in -Asserts builds, and of hiding potentially unnecessary computations. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77019 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-20Use TII->findCommutedOpIndices to find the commute operands (rather than ↵Evan Cheng
guessing). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76472 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16Let callers decide the sub-register index on the def operand of ↵Evan Cheng
rematerialized instructions. Avoid remat'ing instructions whose def have sub-register indices for now. It's just really really hard to get all the cases right. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75900 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-11Two-address pass should use findCommutedOpIndices to determine what ↵Evan Cheng
registers are commuted. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75317 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-26Eliminate VarInfo::UsedBlocks.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72411 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-14Fix for PR4124. Make TwoAddressFormPass::FindLastUseInMBB return the real ↵Lang Hames
last use. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71769 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-13Fix for PR4121. If TwoAddressInstructionPass removes a dead def, and the regBLang Hames
operand was killed, the kill needs to be removed from regB's VarInfo. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71635 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-08Avoid warning in release-asserts build.Mike Stump
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71275 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-28Fix for PR4051. When 2address pass delete an instruction, update kill info ↵Evan Cheng
when necessary. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70279 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-14Fix PR3934 part 2. findOnlyInterestingUse() was not setting IsCopy and ↵Evan Cheng
IsDstPhys which are returned by value and used by callee. This happened to work on the earlier test cases because of a logic error in the caller side. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69006 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-13PR3934: Fix a bogus two-address pass assertion.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68979 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-13Add an assertion to verify that a copy was actually emitted.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68953 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-08Implement support for using modeling implicit-zero-extension on x86-64Dan Gohman
with SUBREG_TO_REG, teach SimpleRegisterCoalescing to coalesce SUBREG_TO_REG instructions (which are similar to INSERT_SUBREG instructions), and teach the DAGCombiner to take advantage of this on targets which support it. This eliminates many redundant zero-extension operations on x86-64. This adds a new TargetLowering hook, isZExtFree. It's similar to isTruncateFree, except it only applies to actual definitions, and not no-op truncates which may not zero the high bits. Also, this adds a new optimization to SimplifyDemandedBits: transform operations like x+y into (zext (add (trunc x), (trunc y))) on targets where all the casts are no-ops. In contexts where the high part of the add is explicitly masked off, this allows the mask operation to be eliminated. Fix the DAGCombiner to avoid undoing these transformations to eliminate casts on targets where the casts are no-ops. Also, this adds a new two-address lowering heuristic. Since two-address lowering runs before coalescing, it helps to be able to look through copies when deciding whether commuting and/or three-address conversion are profitable. Also, fix a bug in LiveInterval::MergeInClobberRanges. It didn't handle the case that a clobber range extended both before and beyond an existing live range. In that case, multiple live ranges need to be added. This was exposed by the new subreg coalescing code. Remove 2008-05-06-SpillerBug.ll. It was bugpoint-reduced, and the spiller behavior it was looking for no longer occurrs with the new instruction selection. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68576 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-30Turn a 2-address instruction into a 3-address one when it's profitable even ↵Evan Cheng
if the two-address operand is killed. e.g. %reg1024<def> = MOV r1 %reg1025<def> = ADD %reg1024, %reg1026 r0 = MOV %reg1025 If it's not possible / profitable to commute ADD, then turning ADD into a LEA saves a copy. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68065 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-23Model inline asm constraint which ties an input to an output register as ↵Evan Cheng
machine operand TIED_TO constraint. This eliminated the need to pre-allocate registers for these. This also allows register allocator can eliminate the unneeded copies. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67512 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-19Added MachineInstr::isRegTiedToDefOperand to check for two-addressness.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67335 91177308-0d34-0410-b5e6-96231b3b80d8
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