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2009-04-16Do not treat beginning of inlined scope as beginning of normal function ↵Devang Patel
scope if the location info is missing. Insetad of doing ... if (inlined_subroutine && known_location) DW_TAG_inline_subroutine else DW_TAG_subprogram do if (inlined_subroutine) { if (known_location) DW_TAG_inline_subroutine } else { DW_TAG_subprogram } git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69300 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-16Record line number at the beginning of a func.start.Devang Patel
This line was accidently lost yesterday. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69286 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-16In -fast mode do what FastISel does.Devang Patel
This code could use some refactoring help! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69254 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-16If FastISel is run and it has known DebugLoc then use it.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69253 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-16If location where the function was inlined is not know then do not emit ↵Devang Patel
debug info describing inlinied region. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69252 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-15Add DISubprogram is not null check.Devang Patel
This fixes test/CodeGen//2009-01-21-invalid-debug-info.m test case. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69210 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-15Generalize one of the SelectionDAG::ReplaceAllUsesWith overloadsDan Gohman
to support replacing a node with another that has a superset of the result types. Use this instead of calling ReplaceAllUsesOfValueWith for each value. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69209 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-15Construct and emit DW_TAG_inlined_subroutine DIEs for inlined subroutine ↵Devang Patel
scopes (only in FastISel mode). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69116 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-14When the result of an EXTRACT_SUBREG, INSERT_SUBREG, or SUBREG_TO_REGDan Gohman
operator is used by a CopyToReg to export the value to a different block, don't reuse the CopyToReg's register for the subreg operation result if the register isn't precisely the right class for the subreg operation. Also, rename the h-registers.ll test, now that there are more than one. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69087 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-14Do not force asm's to be chained if they don't touchDale Johannesen
memory and aren't volatile. This was interfering with good scheduling. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69008 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-13Make these errors more noticable in build logs.Daniel Dunbar
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68998 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-13Change SelectionDAG type legalization to allow BUILD_VECTOR operands to beBob Wilson
promoted to legal types without changing the type of the vector. This is following a suggestion from Duncan (http://lists.cs.uiuc.edu/pipermail/llvmdev/2009-February/019923.html). The transformation that used to be done during type legalization is now postponed to DAG legalization. This allows the BUILD_VECTORs to be optimized and potentially handled specially by target-specific code. It turns out that this is also consistent with an optimization done by the DAG combiner: a BUILD_VECTOR and INSERT_VECTOR_ELT may be combined by replacing one of the BUILD_VECTOR operands with the newly inserted element; but INSERT_VECTOR_ELT allows its scalar operand to be larger than the element type, with any extra high bits being implicitly truncated. The result is a BUILD_VECTOR where one of the operands has a type larger the the vector element type. Any code that operates on BUILD_VECTORs may now need to be aware of the potential type discrepancy between the vector element type and the BUILD_VECTOR operands. This patch updates all of the places that I could find to handle that case. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68996 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-13Rename COPY_TO_SUBCLASS to COPY_TO_REGCLASS, and generalizeDan Gohman
it accordingly. Thanks to Jakob Stoklund Olesen for pointing out how this might be useful. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68986 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-13Refactor some code in SelectionDAGLegalize::ExpandBUILD_VECTOR.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68981 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-13Right now, Debugging information to encode scopes (DW_TAG_lexical_block) ↵Devang Patel
relies on DBG_LABEL. Unfortunately this intefers with the quality of optimized code. This patch updates dwarf writer to encode scoping information in DWARF only in FastISel mode. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68973 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-13Reapply 68847.Devang Patel
Now debug_inlined section is covered by TAI->doesDwarfUsesInlineInfoSection(), which is false by default. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68964 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-13Add a new TargetInstrInfo MachineInstr opcode, COPY_TO_SUBCLASS.Dan Gohman
This will be used to replace things like X86's MOV32to32_. Enhance ScheduleDAGSDNodesEmit to be more flexible and robust in the presense of subregister superclasses and subclasses. It can now cope with the definition of a virtual register being in a subclass of a use. Re-introduce the code for recording register superreg classes and subreg classes. This is needed because when subreg extracts and inserts get coalesced away, the virtual registers are left in the correct subclass. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68961 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-12make UpdateValueMap handle the possiblity that we could beChris Lattner
copying into the right register, avoiding a copy. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68889 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-12optimize FastISel::UpdateValueMap to avoid duplicate map lookups,Chris Lattner
and make it return the assigned register. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68888 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-11Revert r68847. It breaks the build on non-Darwin targets, with this messageDan Gohman
from the assembler: Error: unknown pseudo-op: `.debug_inlined' git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68863 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-11Keep track of inlined functions and their locations. This information is ↵Devang Patel
collected when nested llvm.dbg.func.start intrinsics are seen. (Right now, inliner removes nested llvm.dbg.func.start intrinisics during inlining.) Create debug_inlined dwarf section using these information. This info is used by gdb, at least on Darwin, to enable better experience debugging inlined functions. See DwarfWriter.cpp for more information on structure of debug_inlined section. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68847 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-10Clean up a bunch of whitespace issues and fix a comment typo.Bob Wilson
No functional changes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68808 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-10Now that register classes have names, include the name in debug output.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68786 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-09Remove the obsolete SelectionDAG::getNodeValueTypes and simplifyDan Gohman
code that uses it by using SelectionDAG::getVTList instead. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68744 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-09Silence unused variable warning.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68735 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-09llvm.dbg.func_start also defines beginning of function scope.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68727 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-09Generalize ExtendUsesToFormExtLoad to be usable for ANY_EXTEND,Dan Gohman
in addition to ZERO_EXTEND and SIGN_EXTEND. Fix a bug in the way it checked for live-out values, and simplify the way it find users by using SDNode::use_iterator's (relatively) new features. Also, make it slightly more permissive on targets with free truncates. In SelectionDAGBuild, avoid creating ANY_EXTEND nodes that are larger than necessary. If the target's SwitchAmountTy has enough bits, use it. This exposes the truncate to optimization early, enabling more optimizations. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68670 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-09Don't copy the operand of a SwitchInst into virtual registers asDan Gohman
eagerly. This helps avoid CopyToReg nodes in some cases where they aren't needed, and also helps subsequent optimizer heuristics in cases where the extra nodes would cause the node to appear to have multiple results. This doesn't have a significant impact currently; it'll help an upcoming change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68667 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-08Soft float support for FREM.Duncan Sands
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68614 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-08Soft float support for undef. Reported by Xerxes Rånby.Duncan Sands
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68607 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-08Implement support for using modeling implicit-zero-extension on x86-64Dan Gohman
with SUBREG_TO_REG, teach SimpleRegisterCoalescing to coalesce SUBREG_TO_REG instructions (which are similar to INSERT_SUBREG instructions), and teach the DAGCombiner to take advantage of this on targets which support it. This eliminates many redundant zero-extension operations on x86-64. This adds a new TargetLowering hook, isZExtFree. It's similar to isTruncateFree, except it only applies to actual definitions, and not no-op truncates which may not zero the high bits. Also, this adds a new optimization to SimplifyDemandedBits: transform operations like x+y into (zext (add (trunc x), (trunc y))) on targets where all the casts are no-ops. In contexts where the high part of the add is explicitly masked off, this allows the mask operation to be eliminated. Fix the DAGCombiner to avoid undoing these transformations to eliminate casts on targets where the casts are no-ops. Also, this adds a new two-address lowering heuristic. Since two-address lowering runs before coalescing, it helps to be able to look through copies when deciding whether commuting and/or three-address conversion are profitable. Also, fix a bug in LiveInterval::MergeInClobberRanges. It didn't handle the case that a clobber range extended both before and beyond an existing live range. In that case, multiple live ranges need to be added. This was exposed by the new subreg coalescing code. Remove 2008-05-06-SpillerBug.ll. It was bugpoint-reduced, and the spiller behavior it was looking for no longer occurrs with the new instruction selection. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68576 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-07Revert prev. patch for now.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68569 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-07Right now DBG_LABEL are required for llvm.dbg.region_start and ↵Devang Patel
llvm.dbg.region_end in non-fast mode also. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68559 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-07Don't attempt to handle aggregate argument values in FastISel; letDan Gohman
SelectionDAG do those. This fixes PR3955. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68546 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-03Fix a TargetLowering optimization so that it doesn't duplicateDan Gohman
loads when an input node has multiple uses. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68398 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-03Delete ISD::INSERT_SUBREG and ISD::EXTRACT_SUBREG, which are unused.Dan Gohman
Note that these are distinct from TargetInstrInfo::INSERT_SUBREG and TargetInstrInfo::EXTRACT_SUBREG, which are used. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68355 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-02To convert the StopPoint insn into an assembler directive by ISel, we need ↵Sanjiv Gupta
to have access to the line number field. So we convert that info as an operand by custom handling DBG_STOPPOINT in legalize. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68329 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-31Fully general expansion of integer shift of any size.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68134 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-31Minor top-level comment fix.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68113 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-31Fix live-out reg logic to not insert over-aggressive AssertZExtDan Gohman
instructions. This fixes lua. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68083 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-29Fix PR3899: add support for extracting floats from vectorsDuncan Sands
when using -soft-float. Based on a patch by Jakob Stoklund Olesen. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67996 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-28Make check in CheckTailCallReturnConstraints for ignorable instructions betweenArnold Schwaighofer
a CALL and a RET node more generic. Add a test for tail calls with a void return. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67943 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-28Enable tail call optimization for functions that return a struct (bug 3664) ↵Arnold Schwaighofer
and for functions that return types that need extending (e.g i1). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67934 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-28Optimize some 64-bit multiplication by constants into two lea's or one lea + ↵Evan Cheng
shl since imulq is slow (latency 5). e.g. x * 40 => shlq $3, %rdi leaq (%rdi,%rdi,4), %rax This has the added benefit of allowing more multiply to be folded into addressing mode. e.g. a * 24 + b => leaq (%rdi,%rdi,2), %rax leaq (%rsi,%rax,8), %rax git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67917 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-27Fix what surely must be a copy+pasto.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67881 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-27Initialize LiveOutInfo's APInt members to zero, as APInt'sDan Gohman
default constructor produces an uninitialized APInt. This fixes PR3896. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67879 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-26Pull transform from target-dependent code into target-independent code.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67742 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-25Revert 67132. This is breaking some objective-c apps.Evan Cheng
Also fixes SDISel so it *does not* force promote return value if the function is not marked signext / zeroext. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67701 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-25When optimizing with debug info, don't keep theDale Johannesen
stoppoint nodes around until Legalize; doing this imposed an ordering on a sequence of loads that came from different lines, interfering with scheduling. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67692 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-24more tidying: name the components of PhysReg in the case whenChris Lattner
the target constraint specifies a specific physreg. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67618 91177308-0d34-0410-b5e6-96231b3b80d8
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