aboutsummaryrefslogtreecommitdiff
path: root/lib/CodeGen/SelectionDAG
AgeCommit message (Collapse)Author
2011-02-24Refactor the LiveOutInfo interface into a few methods on FunctionLoweringInfoCameron Zwarich
and make the actual map private. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126376 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-24Have isel visit blocks in reverse postorder rather than an undefined order. ThisCameron Zwarich
allows for the information propagated across basic blocks to be merged at phis. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126375 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-22Roll out r126169 and r126170 in an attempt to fix the selfhost bot.Cameron Zwarich
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126185 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-22Merge information about the number of zero, one, and sign bits of live-out ↵Cameron Zwarich
registers at phis. This enables us to eliminate a lot of pointless zexts during the DAGCombine phase. This fixes <rdar://problem/8760114>. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126170 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-22Have isel visit blocks in reverse postorder rather than an undefined order. ThisCameron Zwarich
allows for the information propagated across basic blocks to be merged at phis. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126169 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-21Revert r124611 - "Keep track of incoming argument's location while emitting ↵Devang Patel
LiveIns." In other words, do not keep track of argument's location. The debugger (gdb) is not prepared to see line table entries for arguments. For the debugger, "second" line table entry marks beginning of function body. This requires some coordination with debugger to get this working. - The debugger needs to be aware of prolog_end attribute attached with line table entries. - The compiler needs to accurately mark prolog_end in line table entries (at -O0 and at -O1+) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126155 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-20Fix 9267; Add vector zext support.Nadav Rotem
The DAGCombiner folds the zext into complex load instructions. This patch prevents this optimization on vectors since none of the supported targets knows how to perform load+vector_zext in one instruction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126080 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-18Do not lose debug info of an inlined function argument even if the argument ↵Devang Patel
is only used through GEPs. This time with a fix that avoids using invalidated DenseMap iterator. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125984 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-18Roll out r125794 to help diagnose the llvm-gcc-i386-linux-selfhost failure.Cameron Zwarich
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125830 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-17Do not lose debug info of an inlined function argument even if the argument ↵Devang Patel
is only used through GEPs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125794 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-17Fix wrong logic in promotion of signed mul-with-overflow (I pointed this out atDuncan Sands
the time but presumably my email got lost). Examples where the previous logic got it wrong: (1) a signed i8 multiply of 64 by 2 overflows, but the high part is zero; (2) a signed i8 multiple of -128 by 2 overflows, but the high part is all ones. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125748 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-16Swap VT and DebugLoc operands of getExtLoad() for consistency withStuart Hastings
other getNode() methods. Radar 9002173. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125665 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-16Refactor zero folding slightly. Clean up todo.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125651 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-16The change for PR9190 wasn't quite right. We need to avoid making theEric Christopher
transformation if we can't legally create a build vector of the correct type. Check that we can make the transformation first, and add a TODO to refactor this code with similar cases. Fixes: PR9223 and rdar://9000350 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125631 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-15convert ConstantVector::get to use ArrayRef.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125537 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-14revert my ConstantVector patch, it seems to have made the llvm-gccChris Lattner
builders unhappy. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125504 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-14Switch ConstantVector::get to use ArrayRef instead of a pointer+sizeChris Lattner
idiom. Change various clients to simplify their code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125487 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-14fix PR9210 by implementing some type legalization logic for Chris Lattner
vector fp conversions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125482 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-14fix two comment thinkosChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125481 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-13Enhance ComputeMaskedBits to know that aligned frameindexesChris Lattner
have their low bits set to zero. This allows us to optimize out explicit stack alignment code like in stack-align.ll:test4 when it is redundant. Doing this causes the code generator to start turning FI+cst into FI|cst all over the place, which is general goodness (that is the canonical form) except that various pieces of the code generator don't handle OR aggressively. Fix this by introducing a new SelectionDAG::isBaseWithConstantOffset predicate, and using it in places that are looking for ADD(X,CST). The ARM backend in particular was missing a lot of addressing mode folding opportunities around OR. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125470 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-13Revisit my fix for PR9028: the issue is that DAGCombine was Chris Lattner
generating i8 shift amounts for things like i1024 types. Add an assert in getNode to prevent this from occuring in the future, fix the buggy transformation, revert my previous patch, and document this gotcha in ISDOpcodes.h git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125465 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-13when legalizing extremely wide shifts, make sure that Chris Lattner
the shift amounts are in a suitably wide type so that we don't generate out of range constant shift amounts. This fixes PR9028. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125458 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-13fix visitShift to properly zero extend the shift amount if the provided operandChris Lattner
is narrower than the shift register. Doing an anyext provides undefined bits in the top part of the register. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125457 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-12A fix for 9165.Nadav Rotem
The DAGCombiner created illegal BUILD_VECTOR operations. The patch added a check that either illegal operations are allowed or that the created operation is legal. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125435 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-11SimplifySelectOps can only handle selects with a scalar condition. Add a checkNadav Rotem
that the condition is not a vector. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125398 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-11Fix #9190Nadav Rotem
The bug happens when the DAGCombiner attempts to optimize one of the patterns of the SUB opcode. It tries to create a zero of type v2i64. This type is legal on 32bit machines, but the initializer of this vector (i64) is target dependent. Currently, the initializer attempts to create an i64 zero constant, which fails. Added a flag to tell the DAGCombiner to create a legal zero, if we require that the pass would generate legal types. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125391 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-07Remove comment about an argument that was removed couple of years ago.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125054 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-04Introducing a new method of tracking register pressure. We can'tAndrew Trick
precisely track pressure on a selection DAG, but we can at least keep it balanced. This design accounts for various interesting aspects of selection DAGS: register and subregister copies, glued nodes, dead nodes, unused registers, etc. Added SUnit::NumRegDefsLeft and ScheduleDAGSDNodes::RegDefIter. Note: I disabled PrescheduleNodesWithMultipleUses when register pressure is enabled, based on no evidence other than I don't think it makes sense to have both enabled. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124853 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-03whitespaceAndrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124827 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-02Given a pair of floating point load and store, if there are no other uses ofEvan Cheng
the load, then it may be legal to transform the load and store to integer load and store of the same width. This is done if the target specified the transformation as profitable. e.g. On arm, this can transform: vldr.32 s0, [] vstr.32 s0, [] to ldr r12, [] str r12, [] rdar://8944252 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124708 91177308-0d34-0410-b5e6-96231b3b80d8
2011-02-01Take Bill Wendling's suggestion for structuring a couple of asserts.Matt Beaumont-Gay
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124688 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-31Keep track of incoming argument's location while emitting LiveIns.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124611 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-31Fix bug where ReduceLoadWidth was creating illegal ZEXTLOAD instructions.Richard Osborne
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124587 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-30Teach DAGCombine to fold fold (sra (trunc (sr x, c1)), c2) -> (trunc (sra x, ↵Benjamin Kramer
c1+c2) when c1 equals the amount of bits that are truncated off. This happens all the time when a smul is promoted to a larger type. On x86-64 we now compile "int test(int x) { return x/10; }" into movslq %edi, %rax imulq $1717986919, %rax, %rax movq %rax, %rcx shrq $63, %rcx sarq $34, %rax <- used to be "shrq $32, %rax; sarl $2, %eax" addl %ecx, %eax This fires 96 times in gcc.c on x86-64. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124559 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-29Add the missing sub identity "A-(A-B) -> B" to DAGCombine.Benjamin Kramer
This happens e.g. for code like "X - X%10" where we lower the modulo operation to a series of multiplies and shifts that are then subtracted from X, leading to this missed optimization. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124532 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-28Fix build with stdcxx by using llvm::next. Patch by Joerg Sonnenberger!Nick Lewycky
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124472 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-27Remove a temporary workaround for a lencod miscompile. Depends on the fix in ↵Andrew Trick
r124442. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124443 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-27Speculatively revert r124380.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124397 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-27While legalizing SDValues do not drop SDDbgValues, trasfer them to new legal ↵Devang Patel
nodes. Take 2. This includes fix for dragonegg crash. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124380 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-27Try harder to not have unused variables.Matt Beaumont-Gay
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124350 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-27Opt-mode -Wunused-variable cleanupMatt Beaumont-Gay
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124346 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-27Reapply 124301Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124339 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-26Initialize variable to get rid of clang warning.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124331 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-26Revert 124301.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124327 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-26Revert r124302Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124320 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-26[AVX] Add INSERT_SUBVECTOR and support it on x86. This provides aDavid Greene
default implementation for x86, going through the stack in a similr fashion to how the codegen implements BUILD_VECTOR. Eventually this will get matched to VINSERTF128 if AVX is available. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124307 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-26While legalizing SDValues do not drop SDDbgValues, trasfer them to new legal ↵Devang Patel
nodes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124302 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-26Process valid SDDbgValues even if the node does not have any order assigned.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124301 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-26Refactor.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124300 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-26[AVX] Support EXTRACT_SUBVECTOR on x86. This provides a defaultDavid Greene
implementation of EXTRACT_SUBVECTOR for x86, going through the stack in a similr fashion to how the codegen implements BUILD_VECTOR. Eventually this will get matched to VEXTRACTF128 if AVX is available. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124292 91177308-0d34-0410-b5e6-96231b3b80d8
generated by cgit v1.2.3-18-g5258 (git 2.32.0) at 2025-06-30 03:26:35 +0000