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2011-04-26Be careful about scheduling nodes above previous calls. It increase usages ofEvan Cheng
more callee-saved registers and introduce copies. Only allows it if scheduling a node above calls would end up lessen register pressure. Call operands also has added ABI restrictions for register allocation, so be extra careful with hoisting them above calls. rdar://9329627 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130245 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-26Fast-isel support for simple inline asms.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130205 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-26Fix typoEvan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130190 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-25A dbg.declare may not be in entry block, even if it is referring to an ↵Devang Patel
incoming argument. However, It is appropriate to emit DBG_VALUE referring to this incoming argument in entry block in MachineFunction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130129 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-23Remove unused STL header includes.Jay Foad
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130068 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-22Teach FastISel to deal with instructions that have two immediate operands.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130033 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-22Recommit the fix for rdar://9289512 with a couple tweaks toChris Lattner
fix bugs exposed by the gcc dejagnu testsuite: 1. The load may actually be used by a dead instruction, which would cause an assert. 2. The load may not be used by the current chain of instructions, and we could move it past a side-effecting instruction. Change how we process uses to define the problem away. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130018 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-22DAGCombine: fold "(zext x) == C" into "x == (trunc C)" if the trunc is lossless.Benjamin Kramer
On x86 this allows to fold a load into the cmp, greatly reducing register pressure. movzbl (%rdi), %eax cmpl $47, %eax -> cmpb $47, (%rdi) This shaves 8k off gcc.o on i386. I'll leave applying the patch in README.txt to Chris :) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130005 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-21Revert r1296656, "Fix rdar://9289512 - not folding load into compare at -O0...",Daniel Dunbar
which broke a couple GCC test suite tests at -O0. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129914 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-20Rewrite the expander for umulo/smulo to remember to sign extend the inputEric Christopher
manually and pass all (now) 4 arguments to the mul libcall. Add a new ExpandLibCall for just this (copied gratuitously from type legalization). Fixes rdar://9292577 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129842 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-19Delete unnecessary variable. <rdar://problem/7662569>Stuart Hastings
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129796 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-19SelectBasicBlock is rather slow even when it doesn't do anything; skip theEli Friedman
unnecessary work where possible. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129763 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-19Support nested CALLSEQ_BEGIN/END; necessary for ARM byval support. ↵Stuart Hastings
<rdar://problem/7662569> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129761 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-19Implement support for x86 fastisel of small fixed-sized memcpys, which are ↵Chris Lattner
generated en-mass for C++ PODs. On my c++ test file, this cuts the fast isel rejects by 10x and shrinks the generated .s file by 5% git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129755 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-18while we're at it, handle 'sdiv exact' of a power of 2 also,Chris Lattner
this fixes a few rejects on c++ iterator loops. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129694 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-18fix rdar://9297011 - udiv by power of two causing fast-isel rejectsChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129693 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-171. merge fast-isel-shift-imm.ll into fast-isel-x86-64.llChris Lattner
2. implement rdar://9289501 - fast isel should fold trivial multiplies to shifts 3. teach tblgen to handle shift immediates that are different sizes than the shifted operands, eliminating some code from the X86 fast isel backend. 4. Have FastISel::SelectBinaryOp use (the poorly named) FastEmit_ri_ function instead of FastEmit_ri to simplify code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129666 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-17fix an oversight which caused us to compile the testcase (and otherChris Lattner
less trivial things) into a dummy lea. Before we generated: _test: ## @test movq _G@GOTPCREL(%rip), %rax leaq (%rax), %rax ret now we produce: _test: ## @test movq _G@GOTPCREL(%rip), %rax ret This is part of rdar://9289558 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129662 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-17Fix rdar://9289512 - not folding load into compare at -O0Chris Lattner
The basic issue here is that bottom-up isel is matching the branch and compare, and was failing to fold the load into the branch/compare combo. Fixing this (by allowing folding into any instruction of a sequence that is selected) allows us to produce things like: cmpb $0, 52(%rax) je LBB4_2 instead of: movb 52(%rax), %cl cmpb $0, %cl je LBB4_2 This makes the generated -O0 code run a bit faster, but also speeds up compile time by putting less pressure on the register allocator and generating less code. This was one of the biggest classes of missing load folding. Implementing this shrinks 176.gcc's c-decl.s (as a random example) by about 4% in (verbose-asm) line count. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129656 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-17split a complex predicate out to a helper function. Simplify two for loops,Chris Lattner
which don't need to check for falling off the end of a block *and* end of phi nodes, since terminators are never phis. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129655 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-17fix rdar://9289583 - fast isel should handle non-canonical commutative binopsChris Lattner
allowing us to fold the immediate into the 'and' in this case: int test1(int i) { return 8&i; } git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129653 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-16PR9055: extend the fix to PR4050 (r70179) to apply to zext and anyext.Eli Friedman
Returning a new node makes the code try to replace the old node, which in the included testcase is killed by CSE. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129650 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-16Fix divmod libcall lowering. Convert to {S|U}DIVREM first and then expand ↵Evan Cheng
the node to a libcall. rdar://9280991 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129633 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-15Fix a ton of comment typos found by codespell. Patch byChris Lattner
Luis Felipe Strano Moraes! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129558 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-14Fix another instance of the DAG combiner not using the correct type for the ↵Owen Anderson
RHS of a shift. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129522 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-14In the pre-RA scheduler, maintain cmp+br proximity.Andrew Trick
This is done by pushing physical register definitions close to their use, which happens to handle flag definitions if they're not glued to the branch. This seems to be generally a good thing though, so I didn't need to add a target hook yet. The primary motivation is to generate code closer to what people expect and rule out missed opportunity from enabling macro-op fusion. As a side benefit, we get several 2-5% gains on x86 benchmarks. There is one regression: SingleSource/Benchmarks/Shootout/lists slows down be -10%. But this is an independent scheduler bug that will be tracked separately. See rdar://problem/9283108. Incidentally, pre-RA scheduling is only half the solution. Fixing the later passes is tracked by: <rdar://problem/8932804> [pre-RA-sched] on x86, attempt to schedule CMP/TEST adjacent with condition jump Fixes: <rdar://problem/9262453> Scheduler unnecessary break of cmp/jump fusion git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129508 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-14sink a call into its only use.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129503 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-13During post-legalization DAG combining, be careful to only create shifts ↵Owen Anderson
where the RHS is of the legal type for the new operation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129484 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-13Recommit r129383. PreRA scheduler heuristic fixes: VRegCycle, TokenFactor ↵Andrew Trick
latency. Additional fixes: Do something reasonable for subtargets with generic itineraries by handle node latency the same as for an empty itinerary. Now nodes default to unit latency unless an itinerary explicitly specifies a zero cycle stage or it is a TokenFactor chain. Original fixes: UnitsSharePred was a source of randomness in the scheduler: node priority depended on the queue data structure. I rewrote the recent VRegCycle heuristics to completely replace the old heuristic without any randomness. To make the ndoe latency adjustments work, I also needed to do something a little more reasonable with TokenFactor. I gave it zero latency to its consumers and always schedule it as low as possible. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129421 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-12Revert 129383. It causes some targets to hit a scheduler assert.Andrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129385 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-12PreRA scheduler heuristic fixes: VRegCycle, TokenFactor latency.Andrew Trick
UnitsSharePred was a source of randomness in the scheduler: node priority depended on the queue data structure. I rewrote the recent VRegCycle heuristics to completely replace the old heuristic without any randomness. To make these heuristic adjustments to node latency work, I also needed to do something a little more reasonable with TokenFactor. I gave it zero latency to its consumers and always schedule it as low as possible. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129383 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-11Don't include Operator.h from InstrTypes.h.Jay Foad
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129271 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-09Avoid excess precision issues that lead to generating host-compiler-specific ↵Chris Lattner
code. Switch lowering probably shouldn't be using FP for this. This resolves PR9581. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129199 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-09have dag combine zap "store undef", which can be formed during call loweringChris Lattner
with undef arguments. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129185 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-08Change -arm-trap-func= into a non-arm specific option. Now Intrinsic::trap ↵Evan Cheng
is lowered into a call to the specified trap function at sdisel time. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129152 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-07Added a check in the preRA scheduler for potential interference on aAndrew Trick
induction variable. The preRA scheduler is unaware of induction vars, so we look for potential "virtual register cycles" instead. Fixes <rdar://problem/8946719> Bad scheduling prevents coalescing git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129100 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-05Revamp the SjLj "dispatch setup" intrinsic.Bill Wendling
It needed to be moved closer to the setjmp statement, because the code directly after the setjmp needs to know about values that are on the stack. Also, the 'bitcast' of the function context was causing a dead load. This wouldn't be too horrible, except that at -O0 it wasn't optimized out, and because it wasn't using the correct base pointer (if there is a VLA), it would try to access a value from a garbage address. <rdar://problem/9130540> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128873 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-05Revert 123704; it broke threaded LLVM.Stuart Hastings
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128868 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-02Add a RemoveFromWorklist method to DCI. This is needed to do some complicatedCameron Zwarich
transformations in target-specific DAG combines without causing DAGCombiner to delete the same node twice. If you know of a better way to avoid this (see my next patch for an example), please let me know. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128758 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-01Add comments.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128730 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-01Assign node order numbers to results of call instruction lowering. This ↵Evan Cheng
should improve src line debug info when sdisel is used. rdar://9199118 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128728 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-01Issue libcalls __udivmod*i4 / __divmod*i4 for div / rem pairs.Evan Cheng
rdar://8911343 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128696 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-26Turn SelectionDAGBuilder::GetRegistersForValue into a local function.Benjamin Kramer
It couldn't be used outside of the file because SDISelAsmOperandInfo is local to SelectionDAGBuilder.cpp. Making it a static function avoids a weird linkage dance. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128342 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-25Fix for -pre-RA-sched=source.Andrew Trick
Yet another case of unchecked NULL node (for physreg copy). May fix PR9509. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128266 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-23PR9535: add support for splitting and scalarizing vector ISD::FP_ROUND.Eli Friedman
Also cleaning up some duplicated code while I'm here. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128176 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-23Ensure that def-side physreg copies are scheduled above any other usesAndrew Trick
so the scheduler can't create new interferences on the copies themselves. Prior to this fix the scheduler could get stuck in a loop creating copies. Fixes PR9509. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128164 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-23whitespaceAndrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128163 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-23Added block number and name to isel debug output.Andrew Trick
I'm tired of doing this manually for each checkout. If anyone knows a better way debug isel for non-trivial tests feel free to revert and let me know how to do it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128132 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-21Grammar-o.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128004 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-19Add support for legalizing UINT_TO_FP of vectors on platforms which doNadav Rotem
not have native support for this operation (such as X86). The legalized code uses two vector INT_TO_FP operations and is faster than scalarizing. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127951 91177308-0d34-0410-b5e6-96231b3b80d8
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