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2010-09-24Fix for test/CodeGen/PowerPC/2008-10-17-AsmMatchingOperands.ll crash.John Thompson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114767 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-24Get rid of pop_macro warnings on MSVC.Michael J. Spencer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114750 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-23Revert 114634 for now since buildbot claim it broke Clang self-hosting. I ↵Evan Cheng
doubt it but it's possible it's exposing another bug somewhere. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114681 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-23Fix VS 2010 build.Oscar Fuentes
Patch by Nathan Jeffords! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114661 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-23Follow up to r114630. Do not optimize away unconditional branch following a ↵Evan Cheng
conditional one. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114634 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-23SDISel should not optimize a unconditional branch following a conditional branchEvan Cheng
when the unconditional branch destination is the fallthrough block. The canonicalization makes it easier to allow optimizations on DAGs to invert conditional branches. The branch folding pass (and AnalyzeBranch) will clean up the unnecessary unconditional branches later. This is one of the patches leading up to disabling codegen prepare critical edge splitting. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114630 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-22A select between a constant and zero, when fed by a bit test, can be efficientlyOwen Anderson
lowered using a series of shifts. Fixes <rdar://problem/8285015>. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114599 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-21Fixed pr20314-2.c failure, added E, F, p constraint letters.John Thompson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114490 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-21Rework passing parent pointers into complexpatterns, I forgotChris Lattner
that complex patterns are matched after the entire pattern has a structural match, therefore the NodeStack isn't in a useful state when the actual call to the matcher happens. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114489 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-21If only user of a vreg is an copy instruction to export copy of vreg out of ↵Devang Patel
current basic block then insert DBG_VALUE so that debug value of the variable is also transfered to new vreg. Testcase is in r114476. This fixes radar 8412415. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114478 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-21correct this logic.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114474 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-21Reimplement r114460 in target-independent DAGCombine rather than ↵Owen Anderson
target-dependent, by using the predicate to discover the number of sign bits. Enhance X86's target lowering to provide a useful response to this query. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114473 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-21just like they can opt into getting the root of the pattern beingChris Lattner
matched, allow ComplexPatterns to opt into getting the parent node of the operand being matched. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114472 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-21finish pushing MachinePointerInfo through selectiondags. At this point,Chris Lattner
I think I've audited all uses, so it should be dependable for address spaces, and the pointer+offset info should also be accurate when there. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114464 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-21update a bunch of code to use the MachinePointerInfo version of getStore.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114461 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-21Define the TargetLowering::getTgtMemIntrinsic hook for ARM so that NEON loadBob Wilson
and store intrinsics are represented with MemIntrinsicSDNodes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114454 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-21eliminate an old SelectionDAG::getTruncStore method, propagatingChris Lattner
MachinePointerInfo around more. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114452 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-21eliminate last SelectionDAG::getLoad old entrypoint, on to stores.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114450 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-21fix the code that infers SV info to be correct when dealingChris Lattner
with an indexed load/store that has an offset in the index. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114449 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-21propagate MachinePointerInfo through various uses of the oldChris Lattner
SelectionDAG::getExtLoad overload, and eliminate it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114446 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-21continue MachinePointerInfo'izing, eliminating use of one of the oldChris Lattner
getLoad overloads. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114443 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-21convert dagcombine off the old form of getLoad. This fixes several bugs Chris Lattner
with SVOffset computation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114442 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-21simplify DAGCombiner::SimplifySelectOps step #2/2.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114437 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-21substantially reduce indentation and simplify DAGCombiner::SimplifySelectOps.Chris Lattner
no functionality change (step #1) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114436 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-21a few more trivial updates. This fixes PerformInsertVectorEltInMemory to notChris Lattner
pass a completely incorrect SrcValue, which would result in a miscompile with combiner-aa. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114411 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-21reimplement memcpy/memmove/memset lowering to use MachinePointerInfoChris Lattner
instead of srcvalue/offset pairs. This corrects SV info for mem operations whose size is > 32-bits. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114401 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-21add overloads for SelectionDAG::getLoad, getStore, getTruncStore that take aChris Lattner
MachinePointerInfo. Among other virtues, this doesn't silently truncate the svoffset to 32-bits. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114399 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-21simplify interface to SelectionDAG::getMemIntrinsicNode, making it take a ↵Chris Lattner
MachinePointerInfo git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114397 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-21chagne interface to SelectionDAG::getAtomic to take a MachinePointerInfo,Chris Lattner
eliminating some weird "infer a frame address" logic which was dead. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114396 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-21don't implicitly drop the offset of a machinememoperand when legalizing atomics.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114395 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-21force clients of MachineFunction::getMachineMemOperand to provide aChris Lattner
MachinePointerInfo, propagating the type out a level of API. Remove the old MachineFunction::getMachineMemOperand impl. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114393 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-20When TCO is turned on, it is possible to end up with aliasing FrameIndex's. ↵Owen Anderson
Therefore, CombinerAA cannot assume that different FrameIndex's never alias, but can instead use MachineFrameInfo to get the actual offsets of these slots and check for actual aliasing. This fixes CodeGen/X86/2010-02-19-TailCallRetAddrBug.ll and CodeGen/X86/tailcallstack64.ll when CombinerAA is enabled, modulo a different register allocation sequence. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114348 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-19Revert r114312 while I sort out some issues.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114313 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-19Tentatively enabled DAGCombiner Alias Analysis by default. As far as I know,Owen Anderson
r114268 fixed the last of the blockers to enabling it. I will be monitoring for failures. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114312 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-18Invert the logic of reachesChainWithoutSideEffects(). What we want to check ↵Owen Anderson
is that there is NO path to the destination containing side effects, not that SOME path contains no side effects. In practice, this only manifests with CombinerAA enabled, because otherwise the chain has little to no branching, so "any" is effectively equivalent to "all". git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114268 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-15Check bb to ensure that alloca is in separate basic block.Devang Patel
This fixes funcargs.exp regression reported by gdb testsuite. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113992 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-15If dbg.declare from non-entry block is using alloca from entry block then ↵Devang Patel
use offset available in StaticAllocaMap to emit DBG_VALUE. Right now, this has no material impact because varible info also collected using offset table maintained in machine module info. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113967 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-14Use frame index, if available for byval argument while lowering dbg_declare. ↵Devang Patel
Otherwise let getRegForValue() find register for this argument. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113843 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-13Revert "CMake: Get rid of LLVMLibDeps.cmake and export the libraries normally."Michael J. Spencer
This reverts commit r113632 Conflicts: cmake/modules/AddLLVM.cmake git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113819 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-13Silence more warnings. Two more unused variables.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113771 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-13Added skeleton for inline asm multiple alternative constraint support.John Thompson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113766 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-10CMake: Get rid of LLVMLibDeps.cmake and export the libraries normally.Michael J. Spencer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113632 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-10Add DEBUG message.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113614 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-10Teach if-converter to be more careful with predicating instructions that wouldEvan Cheng
take multiple cycles to decode. For the current if-converter clients (actually only ARM), the instructions that are predicated on false are not nops. They would still take machine cycles to decode. Micro-coded instructions such as LDM / STM can potentially take multiple cycles to decode. If-converter should take treat them as non-micro-coded simple instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113570 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-05implement rdar://6653118 - fastisel should fold loads where possible.Chris Lattner
Since mem2reg isn't run at -O0, we get a ton of reloads from the stack, for example, before, this code: int foo(int x, int y, int z) { return x+y+z; } used to compile into: _foo: ## @foo subq $12, %rsp movl %edi, 8(%rsp) movl %esi, 4(%rsp) movl %edx, (%rsp) movl 8(%rsp), %edx movl 4(%rsp), %esi addl %edx, %esi movl (%rsp), %edx addl %esi, %edx movl %edx, %eax addq $12, %rsp ret Now we produce: _foo: ## @foo subq $12, %rsp movl %edi, 8(%rsp) movl %esi, 4(%rsp) movl %edx, (%rsp) movl 8(%rsp), %edx addl 4(%rsp), %edx ## Folded load addl (%rsp), %edx ## Folded load movl %edx, %eax addq $12, %rsp ret Fewer instructions and less register use = faster compiles. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113102 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-03Add a missing check when legalizing a vector extending load. This doesn'tBob Wilson
solve the root problem, but it corrects the bug in the code I added to support legalizing in the case where the non-extended type is also legal. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112997 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-02Detect undef value early and save unnecessary NodeMap query.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112864 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-02Don't narrow the load and store in a load+twiddle+store sequence unlessDan Gohman
there are clearly no stores between the load and the store. This fixes this miscompile reported as PR7833. This breaks the test/CodeGen/X86/narrow_op-2.ll optimization, which is safe, but awkward to prove safe. Move it to X86's README.txt. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112861 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-02Tidy up.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112858 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-31Reapply r112623. Included additional check for unused byval argument.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112659 91177308-0d34-0410-b5e6-96231b3b80d8
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