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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54349 91177308-0d34-0410-b5e6-96231b3b80d8
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- Add a basic machine-level dead block eliminator.
These two have to go together, since many other parts of the code generator are unable to handle the unreachable blocks otherwise created.
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This allows it to work correctly on aggregate values.
This fixes PR2623.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54331 91177308-0d34-0410-b5e6-96231b3b80d8
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This allows it to work correctly on nested aggregate values.
This fixes PR2625.
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switches use the binary search algorithm) for
environments that don't support it. PPC64 JIT
is such an environment; turn the flag on for that.
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it isn't always visible to gdb.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54228 91177308-0d34-0410-b5e6-96231b3b80d8
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empty structs. This fixes PR2612.
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The CellSPU codegen is broken, but needs to be fixed before we can
put this back in.
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CodeGen & Clang work coming next.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54161 91177308-0d34-0410-b5e6-96231b3b80d8
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a new ilist_node class, and remove them. Unlike alist_node,
ilist_node doesn't attempt to manage storage itself, so it avoids
the associated problems, including being opaque in gdb.
Adjust the Recycler class so that it doesn't depend on alist_node.
Also, change it to use explicit Size and Align parameters, allowing
it to work when the largest-sized node doesn't have the greatest
alignment requirement.
Change MachineInstr's MachineMemOperand list from a pool-backed
alist to a std::list for now.
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the SelectionDAG's.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54128 91177308-0d34-0410-b5e6-96231b3b80d8
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parallel its analogue, Value::value_use_iterator. The operator* method
now returns the user, rather than the use.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54124 91177308-0d34-0410-b5e6-96231b3b80d8
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unary operations! Add support for softening
some additional unary operations like fp_to_sint.
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dependencies with constant load nodes. This allows them to be scheduled
freely.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54001 91177308-0d34-0410-b5e6-96231b3b80d8
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Remove the GetResultInst instruction. It is still accepted in LLVM assembly
and bitcode, where it is now auto-upgraded to ExtractValueInst. Also, remove
support for return instructions with multiple values. These are auto-upgraded
to use InsertValueInst instructions.
The IRBuilder still accepts multiple-value returns, and auto-upgrades them
to InsertValueInst instructions.
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output a vector value. Patch by Nicolas Capens!
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and use the right result number, in the off chance that the graph root
has multiple result values.
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SelectionDAG graph writer to make use of them. Now, nodes with multiple
values are displayed as such, with incoming edges pointing to the
specific value they use.
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that include useful information like the name of the
block being viewed and the current phase of compilation.
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generic SDNode's (nodes with their own constructors
should do sanity checking in the constructor). Add
sanity checks for BUILD_VECTOR and fix all the places
that were producing bogus BUILD_VECTORs, as found by
"make check". My favorite is the BUILD_VECTOR with
only two operands that was being used to build a
vector with four elements!
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Richard Pennington.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53772 91177308-0d34-0410-b5e6-96231b3b80d8
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the night realising that it was wrong :) I
think the reason the same type was being used
for the shufflevec of indices as for the actual
indices is so that if one of them needs splitting
then so does the other. After my patch it might
be that the indices need splitting but not the
rest, yet there is no good way of handling that.
I think the right solution is to not have the
shufflevec be an operand at all: just have it
be the list of numbers it actually is, stored
as extra info in the node.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53768 91177308-0d34-0410-b5e6-96231b3b80d8
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PseudoSourceValue values, which never have names. Use getName()
for all other values, because we want to print just a short summary
of the value, not the entire instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53738 91177308-0d34-0410-b5e6-96231b3b80d8
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mask. These are just indices into the shuffled vector
so their type is unrelated to the type of the
shuffled elements (which is what was being used before).
This fixes vec_shuffle-11.ll when using LegalizeTypes.
What seems to have happened is that Dan's recent change
r53687, which corrected the result type of the shuffle,
somehow caused LegalizeTypes to notice that the mask
operand was a BUILD_VECTOR with a legal type but elements
of an illegal type (i64). LegalizeTypes legalized this
by introducing a new BUILD_VECTOR of i32 and bitcasting
it to the old type. But the mask operand is not supposed
to be a bitcast but a straight BUILD_VECTOR of constants,
causing a crash.
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replacement of multiple values. This is slightly more efficient
than doing multiple ReplaceAllUsesOfValueWith calls, and theoretically
could be optimized even further. However, an important property of this
new function is that it handles the case where the source value set and
destination value set overlap. This makes it feasible for isel to use
SelectNodeTo in many very common cases, which is advantageous because
SelectNodeTo avoids a temporary node and it doesn't require CSEMap
updates for users of values that don't change position.
Revamp MorphNodeTo, which is what does all the work of SelectNodeTo, to
handle operand lists more efficiently, and to correctly handle a number
of corner cases to which its new wider use exposes it.
This commit also includes a change to the encoding of post-isel opcodes
in SDNodes; now instead of being sandwiched between the target-independent
pre-isel opcodes and the target-dependent pre-isel opcodes, post-isel
opcodes are now represented as negative values. This makes it possible
to test if an opcode is pre-isel or post-isel without having to know
the size of the current target's post-isel instruction set.
These changes speed up llc overall by 3% and reduce memory usage by 10%
on the InstructionCombining.cpp testcase with -fast and -regalloc=local.
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only missing ppc long double operations: FNEG
and FP_EXTEND.
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it is breaking Darwin bootstrap due to missing
functionality.
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was turned up by some new SelectionDAG assertion checks that I'm
working on.
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and AssertSext. Needed when passing huge integer
parameters with the zeroext or signext attributes.
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While this is not a wonderful organizing principle, it
does make it easy to find routines, and clear where to
insert new ones.
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just use the AllNodes order, which is at least relatively stable
across runs.
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In LegalizeDAG the value is zero-extended to
the new type before byte swapping. It doesn't
matter how the extension is done since the new
bits are shifted off anyway after the swap, so
extend by any old rubbish bits. This results
in the final assembler for the testcase being
one line shorter.
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No change in functionality.
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alignment
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the BB member to the current basic block after emitting
instructions.
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