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path: root/lib/CodeGen/SelectionDAG
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2009-01-03Fix a DAGCombiner abort on an invalid shift count constant. This fixes PR3250.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61613 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-03CommuteNodesToReducePressure() is now removed.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61612 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-03Remove the code from the scheduler that commuted two-addressDan Gohman
instructions to avoid copies, because TwoAddressInstructionPass also does this optimization. The scheduler's version didn't account for live-out values, which resulted in spurious commutes and missed opportunities. Now, TwoAddressInstructionPass handles all the opportunities, instead of just those that the scheduler missed. The result is usually the same, though there are occasional trivial differences resulting from the avoidance of spurious commutes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61611 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-01Factorize (and generalize) the code promoting SELECTDuncan Sands
and BRCOND conditions. Reorder a few methods while there. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61547 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-01Remove trailing spaces.Duncan Sands
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61545 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-01Fix PR3274: when promoting the condition of a BRCOND node,Duncan Sands
promote from i1 all the way up to the canonical SetCC type. In order to discover an appropriate type to use, pass MVT::Other to getSetCCResultType. In order to be able to do this, change getSetCCResultType to take a type as an argument, not a value (this is also more logical). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61542 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-29Teach LeaglizeDAG that i64 mul can be a libcall.Scott Michel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61463 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-23Change comments so everybody can understand them, hopefully.Dale Johannesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61405 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-23Add another permutation where we should get rid of a-a.Dale Johannesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61401 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-23Restore debug printingAnton Korobeynikov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61398 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-23Sometimes APInt syntax is really ugly... :(Anton Korobeynikov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61397 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-23Indent stuff properlyAnton Korobeynikov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61396 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-23Initial checkin of APInt'ififcation of switch loweringAnton Korobeynikov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61395 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-23Clean up the atomic opcodes in SelectionDAG.Dan Gohman
This removes all the _8, _16, _32, and _64 opcodes and replaces each group with an unsuffixed opcode. The MemoryVT field of the AtomicSDNode is now used to carry the size information. In tablegen, the size-specific opcodes are replaced by size-independent opcodes that utilize the ability to compose them with predicates. This shrinks the per-opcode tables and makes the code that handles atomics much more concise. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61389 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-23Rename BuildSchedUnits to BuildSchedGraph, and refactor theDan Gohman
code in ScheduleDAGSDNodes' BuildSchedGraph into separate functions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61376 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-23Avoid an unnecessary call to allnodes_size(), which is linear.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61372 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-23One more permutation of subtracting off a base value.Dale Johannesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61361 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-18Added support for vector widening.Mon P Wang
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61209 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-17Fix expansion of vsetcc to set the high bit for true instead of 1.Mon P Wang
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61129 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-17Double the amount of memory reserved for SUnits. This is aDan Gohman
temporary workaround for an obscure bug. When node cloning is used, it is possible that more SUnits will be created, and if the SUnits std::vector has to reallocate, it will invalidate all the graph edges. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61122 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-17Fix for PR3225: disable a broken optimization inEli Friedman
DAGTypeLegalizer::ExpandShiftWithKnownAmountBit. In terms of restoring the optimization, the best fix here isn't obvious... any ideas? git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61119 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-16A new dag combine; several permutations of thisDale Johannesen
are there under ADD, this one was missing. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61107 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-16Preserve SourceValue information when lowering produces multiple loads fromDan Gohman
different offsets within the same stack slot. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61093 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-16We have decided not to support inline asm where an output operand with a ↵Evan Cheng
matching input operand with incompatible type (i.e. either one is a floating point and the other is an integer or the sizes of the types differ). SelectionDAGBuild will catch these and exit with an error. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61092 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-16Remove some special-case logic in ScheduleDAGSDNodes's Dan Gohman
latency computation code that is no longer needed with the new method for handling latencies. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61074 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-16Fix some register-alias-related bugs in the post-RA scheduler livenessDan Gohman
computation code. Also, avoid adding output-depenency edges when both defs are dead, which frequently happens with EFLAGS defs. Compute Depth and Height lazily, and always in terms of edge latency values. For the schedulers that don't care about latency, edge latencies are set to 1. Eliminate Cycle and CycleBound, and LatencyPriorityQueue's Latencies array. These are all subsumed by the Depth and Height fields. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61073 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-16Make addPred and removePred return void, since the return value is notDan Gohman
currently used by anything. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61066 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-15Added support for splitting and scalarizing vector shifts.Mon P Wang
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61050 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-15Fix printing of PseudoSourceValues in SDNode graphs.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61036 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-15Added support to LegalizeType for expanding the operands of scalar to vectorMon P Wang
and insert vector element. Modified extract vector element to extend the result to match the expected promoted type. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61029 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-14Reapply r60997, this time without forgetting thatDuncan Sands
target constants are allowed to have an illegal type. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61006 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-13Temporarily revert r60997. It was causing this failure:Bill Wendling
Running /Users/void/llvm/llvm.src/test/CodeGen/Generic/dg.exp ... FAIL: /Users/void/llvm/llvm.src/test/CodeGen/Generic/asm-large-immediate.ll Failed with exit(1) at line 1 while running: llvm-as < /Users/void/llvm/llvm.src/test/CodeGen/Generic/asm-large-immediate.ll | llc | /usr/bin/grep 68719476738 Assertion failed: ((TypesNeedLegalizing || getTypeAction(VT) == Legal) && "Illegal type introduced after type legalization?"), function HandleOp, file /Users/void/llvm/llvm.src/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp, line 493. 0 llc 0x0085392e char const* std::find<char const*, char>(char const*, char const*, char const&) + 98 1 llc 0x00853e63 llvm::sys::PrintStackTraceOnErrorSignal() + 593 2 libSystem.B.dylib 0x96cac09b _sigtramp + 43 3 libSystem.B.dylib 0xffffffff _sigtramp + 1765097359 4 libSystem.B.dylib 0x96d24ec2 raise + 26 5 libSystem.B.dylib 0x96d3447f abort + 73 6 libSystem.B.dylib 0x96d26063 __assert_rtn + 101 7 llc 0x004f9018 llvm::cast_retty<llvm::SubprogramDesc, llvm::DebugInfoDesc*>::ret_type llvm::cast<llvm::Sub ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61001 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-13LegalizeDAG is not supposed to introduce illegalDuncan Sands
types into the DAG if they were not already there. Check this with an assertion. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60997 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-13Remove assertion to allow promotion of a truncating store operandMon P Wang
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60975 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-13Added basic support for expanding VSETCCMon P Wang
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60974 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-13On big-endian machines it is wrong to do a fullDuncan Sands
width register load followed by a truncating store for the copy, since the load will not place the value in the lower bits. Probably partial loads/stores can never happen here, but fix it anyway. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60972 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-12When expanding unaligned loads and stores do not makeDuncan Sands
use of illegal integer types: instead, use a stack slot and copying via integer registers. The existing code is still used if the bitconvert is to a legal integer type. This fires on the PPC testcases 2007-09-08-unaligned.ll and vec_misaligned.ll. It looks like equivalent code is generated with these changes, just permuted, but it's hard to tell. With these changes, nothing in LegalizeDAG produces illegal integer types anymore. This is a prerequisite for removing the LegalizeDAG type legalization code. While there I noticed that the existing code doesn't handle trunc store of f64 to f32: it turns this into an i64 store, which represents a 4 byte stack smash. I added a FIXME about this. Hopefully someone more motivated than I am will take care of it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60964 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-12Fix add/sub expansion: don't create ADD / SUB with two results (seems like ↵Evan Cheng
everyone is doing this these days :-). Patch by Daniel M Gessel! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60958 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-12When using a 4 byte jump table on a 64 bit machine,Duncan Sands
do an extending load of the 4 bytes rather than a potentially illegal (type) i32 load followed by a sign extend. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60945 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-12Added support for SELECT v8i8 v4i16 for X86 (MMX)Mon P Wang
Added support for TRUNC v8i16 to v8i8 for X86 (MMX) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60916 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-12Redo the arithmetic with overflow architecture. I was changing the semantics ofBill Wendling
ISD::ADD to emit an implicit EFLAGS. This was horribly broken. Instead, replace the intrinsic with an ISD::SADDO node. Then custom lower that into an X86ISD::ADD node with a associated SETCC that checks the correct condition code (overflow or carry). Then that gets lowered into the correct X86::ADDOvf instruction. Similar for SUB and MUL instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60915 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-11Avoid generating a convert_rndsat node when the src and dest type are the same.Mon P Wang
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60869 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-11Clarify FIXME.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60867 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-11Whitespace clean up (tabs with spaces)Mon P Wang
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60866 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-11Make fix for r60829 less conservative to allow the proper optimization forMon P Wang
vec_extract-sse4.ll. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60865 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-10If ADD, SUB, or MUL have an overflow bit that's used, don't do transformation onBill Wendling
them. The DAG combiner expects that nodes that are transformed have one value result. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60857 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-10For amusement, implement SADDO, SSUBO, UADDO, USUBODuncan Sands
for promoted integer types, eg: i16 on ppc-32, or i24 on any platform. Complete support for arbitrary precision integers would require handling expanded integer types, eg: i128, but I couldn't be bothered. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60834 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-10Fixed a bug when trying to optimize a extract vector element of aMon P Wang
bit convert that changes the number of elements of a shuffle. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60829 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-10Whitespace changes.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60826 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-10Whitespace fixes.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60818 91177308-0d34-0410-b5e6-96231b3b80d8
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