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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37799 91177308-0d34-0410-b5e6-96231b3b80d8
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Uncovered by _GLIBCXX_DEBUG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37795 91177308-0d34-0410-b5e6-96231b3b80d8
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ordering and thus violated the strict weak ordering requirement of
priority_queue. Uncovered by _GLIBCXX_DEBUG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37794 91177308-0d34-0410-b5e6-96231b3b80d8
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vectors are split down to single elements as part of legalization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37785 91177308-0d34-0410-b5e6-96231b3b80d8
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illegal value type will be transformed to, for code that needs the
register type after all transformations instead of just after the first
transformation.
Factor out the code that uses this information to do copy-from-regs and
copy-to-regs for various purposes into separate functions so that they
are done consistently.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37781 91177308-0d34-0410-b5e6-96231b3b80d8
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pad, add it as livein to all the blocks in the paths between the landing pad and the specified block.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37763 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37758 91177308-0d34-0410-b5e6-96231b3b80d8
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to compute the number and type of registers needed for vector values
instead of computing it manually. This fixes PR1529.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37755 91177308-0d34-0410-b5e6-96231b3b80d8
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with single-element vectors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37752 91177308-0d34-0410-b5e6-96231b3b80d8
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extended vector types. Remove the special SDNode opcodes used for pre-legalize
vector operations, and the special MVT::Vector type used with them. Adjust
lowering and legalize to work with the normal SDNode kinds instead, and to
use the normal MVT functions to work with vector types instead of using the
two special operands that the pre-legalize nodes held.
This allows pre-legalize and post-legalize DAGs, and the code that operates
on them, to be more consistent. Pre-legalize vector operators can be handled
more consistently with scalar operators. And, -view-dag-combine1-dags and
-view-legalize-dags now look prettier for vector code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37719 91177308-0d34-0410-b5e6-96231b3b80d8
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TargetLowering to SelectionDAG so that they have more convenient
access to the current DAG, in preparation for the ValueType routines
being changed from standalone functions to members of SelectionDAG for
the pre-legalize vector type changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37704 91177308-0d34-0410-b5e6-96231b3b80d8
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time. For Duraid's example. The overall isel time is reduced from 0.6255 sec to 0.1876 sec.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37701 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37688 91177308-0d34-0410-b5e6-96231b3b80d8
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TargetLowering::getNumRegisters and similar, to avoid confusion with
the actual number of elements for vector types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37687 91177308-0d34-0410-b5e6-96231b3b80d8
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(add (select cc, 0, c), x) -> (select cc, x, (add, x, c))
(sub x, (select cc, 0, c)) -> (select cc, x, (sub, x, c))
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37685 91177308-0d34-0410-b5e6-96231b3b80d8
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for needing the DAG node to print pre-legalize extended value types, and
to get better debug messages with target-specific nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37656 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37640 91177308-0d34-0410-b5e6-96231b3b80d8
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by making it non-recursive
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37629 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37626 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37608 91177308-0d34-0410-b5e6-96231b3b80d8
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for tied register constraints.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37601 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37597 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37579 91177308-0d34-0410-b5e6-96231b3b80d8
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turned on. Likewise for scanning of invokes to mark landing pads.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37570 91177308-0d34-0410-b5e6-96231b3b80d8
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VCONCAT_VECTORS. Use these for CopyToReg and CopyFromReg legalizing in
the case that the full register is to be split into subvectors instead
of scalars. This replaces uses of VBIT_CONVERT to present values as
vector-of-vector types in order to make whole subvectors accessible via
BUILD_VECTOR and EXTRACT_VECTOR_ELT.
This is in preparation for adding extended ValueType values, where
having vector-of-vector types is undesirable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37569 91177308-0d34-0410-b5e6-96231b3b80d8
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correct types for the result vector, even though it is currently bitcasted
to a different type immediately.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37568 91177308-0d34-0410-b5e6-96231b3b80d8
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crashing but breaks exception handling. The problem
described in PR1224 is that invoke is a terminator that
can produce a value. The value may be needed in other
blocks. The code that writes to registers values needed
in other blocks runs before terminators are lowered (in
this case invoke) so asserted because the value was not
yet available. The fix that was applied was to do invoke
lowering earlier, before writing values to registers.
The problem this causes is that the code to copy values
to registers can be output after the invoke call. If
an exception is raised and control is passed to the
landing pad then this copy-code will never execute. If
the value is needed in some code path reached via the
landing pad then that code will get something bogus.
So revert the original fix and simply skip invoke values
in the general copying to registers code. Instead copy
the invoke value to a register in the invoke lowering code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37567 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37496 91177308-0d34-0410-b5e6-96231b3b80d8
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correct machine basic block - do not rely on the eh.exception intrinsic
being in the landing pad: the loop optimizers can move it out.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37463 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37413 91177308-0d34-0410-b5e6-96231b3b80d8
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that the CSE map always contains explicit alignment information. This allows
more loads to be CSE'd when there is a mix of explicit-alignment loads and
implicit-alignment loads.
Also, in SelectionDAG::FindModifiedNodeSlot, add the operands to the
FoldingSetNodeID before the load/store information instead of after, so
that it matches what is done elsewhere.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37411 91177308-0d34-0410-b5e6-96231b3b80d8
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simplifies the code in DwarfWriter, allows for multiple filters and
makes it trivial to specify filters accompanied by cleanups or catch-all
specifications (see next patch). What a deal! Patch blessed by Anton.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37398 91177308-0d34-0410-b5e6-96231b3b80d8
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as a null i8 pointer not as a 0 i32.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37383 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37362 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37330 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37321 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37320 91177308-0d34-0410-b5e6-96231b3b80d8
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value store is the same as the base pointer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37318 91177308-0d34-0410-b5e6-96231b3b80d8
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LP info too. This fixes PR1439
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37311 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37310 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37249 91177308-0d34-0410-b5e6-96231b3b80d8
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this case, the xform introduces an extra operation). This compiles
PowerPC/compare-duplicate.ll into:
_test:
subf r2, r3, r4
cmplw cr0, r2, r3
bne cr0, LBB1_2 ;F
instead of:
_test:
slwi r2, r3, 1
subf r3, r3, r4
cmplw cr0, r4, r2
bne cr0, LBB1_2 ;F
This is target independent of course.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37246 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37233 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37230 91177308-0d34-0410-b5e6-96231b3b80d8
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i128 integers. The 64-bit masks are not wide enough to represent the results.
These should be converted to APInt someday.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37169 91177308-0d34-0410-b5e6-96231b3b80d8
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on 32-bit (or less) targets
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37168 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37134 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37130 91177308-0d34-0410-b5e6-96231b3b80d8
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This fixes PR1423
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37102 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37094 91177308-0d34-0410-b5e6-96231b3b80d8
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