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path: root/lib/CodeGen/SelectionDAG/TargetLowering.cpp
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2009-01-29Make x86's BT instruction matching more thorough, and add someDan Gohman
dagcombines that help it match in several more cases. Add several more cases to test/CodeGen/X86/bt.ll. This doesn't yet include matching for BT with an immediate operand, it just covers more register+register cases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63266 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-28Make isOperationLegal do what its name suggests, and introduce aDan Gohman
new isOperationLegalOrCustom, which does what isOperationLegal previously did. Update a bunch of callers to use isOperationLegalOrCustom instead of isOperationLegal. In some case it wasn't obvious which behavior is desired; when in doubt I changed then to isOperationLegalOrCustom as that preserves their previous behavior. This is for the second half of PR3376. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63212 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-22Add SelectionDAG::getNOT method to construct bitwise NOT operations,Bob Wilson
corresponding to the "not" and "vnot" PatFrags. Use the new method in some places where it seems appropriate. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62768 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-18Few targets like PIC16 wants libcall generation for illegal type i16.Sanjiv Gupta
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62467 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-15Make getWidenVectorType const; this file was missed in theDan Gohman
previous commit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62266 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-05TargetLowering.h #includes SelectionDAGNodes.h, so it doesn't need itsDan Gohman
own OpActionsCapacity magic number; it can just use ISD::BUILTIN_OP_END, as long as it takes care to round up when needed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61733 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-01Fix PR3274: when promoting the condition of a BRCOND node,Duncan Sands
promote from i1 all the way up to the canonical SetCC type. In order to discover an appropriate type to use, pass MVT::Other to getSetCCResultType. In order to be able to do this, change getSetCCResultType to take a type as an argument, not a value (this is also more logical). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61542 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-18Added support for vector widening.Mon P Wang
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61209 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-30Followup to r60283: optimize arbitrary width signed divisions as well Eli Friedman
as unsigned divisions. Same caveats as before. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60284 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-30Fix for PR2164: allow transforming arbitrary-width unsigned divides intoEli Friedman
multiplies. Some more cleverness would be nice, though. It would be nice if we could do this transformation on illegal types. Also, we would prefer a narrower constant when possible so that we can use a narrower multiply, which can be cheaper. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60283 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-30APIntify a test which is potentially unsafe otherwise, and fix the Eli Friedman
nearby FIXME. I'm not sure what the right way to fix the Cell test was; if the approach I used isn't okay, please let me know. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60277 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-23Rename SetCCResultContents to BooleanContents. InDuncan Sands
practice these booleans are mostly produced by SetCC, however the concept is more general. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59911 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-12Fix the testb optimization so x86 also bootstraps.Dale Johannesen
Reenable test. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59101 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-10Temporarily revert r58979 and related patch. It's causing a failure in X86 ↵Bill Wendling
bootstrap: Comparing stages 2 and 3 warning: ./cc1-checksum.o differs warning: ./cc1obj-checksum.o differs warning: ./cc1objplus-checksum.o differs warning: ./cc1plus-checksum.o differs Bootstrap comparison failure! ./alias.o differs ./alloc-pool.o differs ./attribs.o differs ./bb-reorder.o differs ./bitmap.o differs ./build/errors.o differs ./build/genattrtab.o differs ./build/genautomata.o differs ./build/genemit.o differs ./build/genextract.o differs ... -bw git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59003 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-10Really fix testb optimization on big-endian.Dale Johannesen
Fixes ppc32 bootstrap. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58979 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-09Temporarily revert 58825, which breaks PPC bootstrap.Dale Johannesen
xs git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58930 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-08Make testb optimization work on big-endian targets.Dale Johannesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58874 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-07When we're doing a compare of load-AND-constant to 0Dale Johannesen
(e.g. a bitfield test) narrow the load as much as possible. The has the potential to avoid unnecessary partial-word load-after-store conflicts, which cause stalls on several targets. Also a size win on x86 (testb vs testl). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58825 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-06Widening cleanupMon P Wang
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58796 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-30Add initial support for vector widening. Logic is set to widen for X86.Mon P Wang
One will only see an effect if legalizetype is not active. Will move support to LegalizeType soon. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58426 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-18Teach DAGCombine to fold constant offsets into GlobalAddress nodes,Dan Gohman
and add a TargetLowering hook for it to use to determine when this is legal (i.e. not in PIC mode, etc.) This allows instruction selection to emit folded constant offsets in more cases, such as the included testcase, eliminating the need for explicit arithmetic instructions. This eliminates the need for the C++ code in X86ISelDAGToDAG.cpp that attempted to achieve the same effect, but wasn't as effective. Also, fix handling of offsets in GlobalAddressSDNodes in several places, including changing GlobalAddressSDNode's offset from int to int64_t. The Mips, Alpha, Sparc, and CellSPU targets appear to be unaware of GlobalAddress offsets currently, so set the hook to false on those targets. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57748 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-17Keep track of *which* input constraint matches an outputChris Lattner
constraint. Reject asms where an output has multiple input constraints tied to it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57687 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-17add an assert so that PR2356 explodes instead of running off anChris Lattner
array. Improve some minor comments, refactor some helpers in AsmOperandInfo. No functionality change for valid code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57686 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-15- Add target lowering hooks that specify which setcc conditions are illegal,Evan Cheng
i.e. conditions that cannot be checked with a single instruction. For example, SETONE and SETUEQ on x86. - Teach legalizer to implement *illegal* setcc as a and / or of a number of legal setcc nodes. For now, only implement FP conditions. e.g. SETONE is implemented as SETO & SETNE, SETUEQ is SETUO | SETEQ. - Move x86 target over. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57542 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-14Rename LoadX to LoadExt.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57526 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-13 * Make TargetLowering not crash when TargetMachine::getTargetAsmInfo() returnsMatthijs Kooijman
null. This assumes that any target that does not have AsmInfo, does not support "LocAndDot". git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57438 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-26Rename ConstantSDNode's getSignExtended to getSExtValue, forDan Gohman
consistancy with ConstantInt, and re-implement it in terms of ConstantInt's getSExtValue. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56700 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-24Properly handle 'm' inline asm constraints. If a GV is being selected for ↵Evan Cheng
the addressing mode, it requires the same logic for PIC relative addressing, etc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56526 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-22Make log, log2, log10, exp, exp2 use Expand byDale Johannesen
default. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56471 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-12Rename ConstantSDNode::getValue to getZExtValue, for consistencyDan Gohman
with ConstantInt. This led to fixing a bug in TargetLowering.cpp using getValue instead of getAPIntValue. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56159 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-04Add intrinsics for log, log2, log10, exp, exp2.Dale Johannesen
No functional change (and no FE change to generate them). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55753 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-28erect abstraction boundaries for accessing SDValue members, rename Val -> ↵Gabor Greif
Node to reflect semantics git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55504 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-21Add libcalls for the new rounding opcodes.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55133 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-07Add the remaining fp_round libcalls:Bruno Cardoso Lopes
FPROUND_F80_F32, FPROUND_PPCF128_F32, FPROUND_F80_F64, FPROUND_PPCF128_F64 Support for soften float fp_round operands is added, Mips needs this to round f64->f32. Also added support to soften float FABS result, Mips doesn't support double fabs results while in 'single float only' mode. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54484 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-27Rename SDOperand to SDValue.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54128 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-17Factorize some code for determining which libcall to use.Duncan Sands
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53713 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-11It is pointless to turn a UINT_TO_FP into anDuncan Sands
SINT_TO_FP libcall plus additional operations: it might as well be a direct UINT_TO_FP libcall. So only turn it into an SINT_TO_FP if the target has special handling for SINT_TO_FP. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53461 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-11Add two missing SINT_TO_FP libcalls.Duncan Sands
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53460 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-11Add support for 128 bit shifts and 32 bit shiftsDuncan Sands
on 16 bit machines. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53458 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-10Add support for 128 bit multiplicative operations.Duncan Sands
Lack of these caused a bootstrap failure with Fortran on x86-64 with LegalizeTypes turned on. While there, be nice to 16 bit machines and support expansion of i32 too. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53408 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-10Add a mysteriously missing libcall, FPTOSINT_F80_I32.Duncan Sands
Be nice to 16 bit machines by supporting FP_TO_XINT expansion for these. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53407 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-25Add support for expanding PPC 128 bit floats.Duncan Sands
For this it is convenient to permit floats to be used with EXTRACT_ELEMENT, so I tweaked things to allow that. I also added libcalls for ppcf128 to i32 forms of FP_TO_XINT, since they exist in libgcc and this case can certainly occur (and does occur in the testsuite) - before the i64 libcall was being used. Also, the XINT_TO_FP result seemed to be wrong when the argument is an i128: the wrong fudge factor was added (the i32 and i64 cases were handled directly, but the i128 code fell through to some generic softening code which seemed to think it was i64 to f32!). So I fixed it by adding a fudge factor that I found in my breakfast cereal. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52739 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-09Teach isGAPlusOffset to respect a GlobalAddressSDNode's offsetDan Gohman
value, which is something that apparently isn't used much. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52158 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-09Various tweaks related to apint codegen. No functionalityDuncan Sands
change for non-funky-sized integers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52151 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-08Remove comparison methods for MVT. The main causeDuncan Sands
of apint codegen failure is the DAG combiner doing the wrong thing because it was comparing MVT's using < rather than comparing the number of bits. Removing the < method makes this mistake impossible to commit. Instead, add helper methods for comparing bits and use them. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52098 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-06Wrap MVT::ValueType in a struct to get type safetyDuncan Sands
and better control the abstraction. Rename the type to MVT. To update out-of-tree patches, the main thing to do is to rename MVT::ValueType to MVT, and rewrite expressions like MVT::getSizeInBits(VT) in the form VT.getSizeInBits(). Use VT.getSimpleVT() to extract a MVT::SimpleValueType for use in switch statements (you will get an assert failure if VT is an extended value type - these shouldn't exist after type legalization). This results in a small speedup of codegen and no new testsuite failures (x86-64 linux). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52044 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-12Xform bitconvert(build_pair(load a, load b)) to a single load if the load ↵Evan Cheng
locations are at the right offset from each other. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51008 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-12Refactor isConsecutiveLoad from X86 to TargetLowering so DAG combiner can ↵Evan Cheng
make use of it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50991 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-06Instead of enumerating each opcode that isn't handled thatDan Gohman
ComputeMaskedBits handles, just use a 'default:'. This avoids TargetLowering's list getting out of date with SelectionDAG's. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50693 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-05Added addition atomic instrinsics and, or, xor, min, and max.Mon P Wang
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50663 91177308-0d34-0410-b5e6-96231b3b80d8
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