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path: root/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
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2007-01-03Legalizer doesn't do an ANY_EXTEND if we don't ask for one so make sureReid Spencer
that we default to an ANY_EXTEND if no parameter attribute is set on the result value of a function. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32836 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-03Restore previous behavior of defaulting to ZEXT. This works around twoReid Spencer
things: (1) preventing PR1071 and (2) working around missing parameter attributes for bool type. (2) will be fixed shortly. When PR1071 is fixed, this patch should be undone. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32831 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-03Two changes:Reid Spencer
1. Switch expression and cases are compared signed and are sign extended. 2. For function results needing extended, do SIGN_EXTEND if the SExtAttribute is set and ZERO_EXTEND if the ZExtAttribute is set, otherwise just let the Legalizer do ANY_EXTEND. This fixes the recent regression in kimwitu++ and probably the llvm-gcc bootstrap issue we had today. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32830 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-31For PR950:Reid Spencer
Three changes: 1. Convert signed integer types to signless versions. 2. Implement the @sext and @zext parameter attributes. Previously the type of an function parameter was used to determine whether it should be sign extended or zero extended before the call. This information is now communicated via the function type's parameter attributes. 3. The interface to LowerCallTo had to be changed in order to accommodate the parameter attribute information. Although it would have been convenient to pass in the FunctionType itself, there isn't always one present in the caller. Consequently, a signedness indication for the result type and for each parameter was provided for in the interface to this method. All implementations were changed to make the adjustment necessary. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32788 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-23For PR950:Reid Spencer
This patch removes the SetCC instructions and replaces them with the ICmp and FCmp instructions. The SetCondInst instruction has been removed and been replaced with ICmpInst and FCmpInst. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32751 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-20getLoad() and getStore() calls missed SVOffset operand. Thanks to Dan GohmanEvan Cheng
for pointing it out! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32712 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-16Fix PR1049 and CodeGen/Generic/2006-12-16-InlineAsmCrash.llChris Lattner
by producing target constants instead of constants. Constants can get selected to li/movri instructions, which causes the scheduler to explode. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32633 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-13More soft-fp work.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32559 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-13Replace CastInst::createInferredCast calls with more accurate castReid Spencer
creation calls. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32521 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-12Expand i32/i64 CopyToReg f32/f64 to BIT_CONVERT + CopyToReg.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32493 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-12Expand formal arguments and call arguments recursively: e.g. f64 -> i64 -> 2 ↵Evan Cheng
x i32. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32476 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-10Cleaned setjmp/longjmp lowering interfaces. Now we're producing rightAnton Korobeynikov
code (both asm & cbe) for Mingw32 target. Removed autoconf checks for underscored versions of setjmp/longjmp. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32415 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-09Preliminary soft float support.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32394 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-07Removing even more <iostream> includes.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32320 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-29Fix for PR1023 by Dan Gohman.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32003 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-29Fix for PR1022 (folding loads of static initializers) by Dan Gohman.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32000 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-29add a hook to allow targets to hack on inline asms to lower them to llvmChris Lattner
when they want to. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31997 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-27Change MachineInstr ctor's to take a TargetInstrDescriptor reference insteadEvan Cheng
of opcode and number of operands. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31947 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-27For PR950:Reid Spencer
The long awaited CAST patch. This introduces 12 new instructions into LLVM to replace the cast instruction. Corresponding changes throughout LLVM are provided. This passes llvm-test, llvm/test, and SPEC CPUINT2000 with the exception of 175.vpr which fails only on a slight floating point output difference. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31931 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-20For PR950:Reid Spencer
First in a series of patches to convert SetCondInst into ICmpInst and FCmpInst using only two opcodes and having the instructions contain their predicate value. Nothing uses these classes yet. More patches to follow. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31867 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-15remove dead #includeChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31753 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-10commentateChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31627 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-08For PR950:Reid Spencer
This patch converts the old SHR instruction into two instructions, AShr (Arithmetic) and LShr (Logical). The Shr instructions now are not dependent on the sign of their operands. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31542 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-02For PR786:Reid Spencer
Turn on -Wunused and -Wno-unused-parameter. Clean up most of the resulting fall out by removing unused variables. Remaining warnings have to do with unused functions (I didn't want to delete code without review) and unused variables in generated code. Maintainers should clean up the remaining issues when they see them. All changes pass DejaGnu tests and Olden. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31380 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-02For PR950:Reid Spencer
Replace the REM instruction with UREM, SREM and FREM. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31369 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-02Allow the getRegForInlineAsmConstraint method to return a register class withChris Lattner
no fixes physreg. Treat this as permission to use any register in the register class. When this happens and it is safe, allow the llvm register allcoator to allocate the register instead of doing it at isel time. This eliminates a ton of copies around common inline asms. For example: int test2(int Y, int X) { asm("foo %0, %1" : "=r"(X): "r"(X)); return X; } now compiles to: _test2: foo r3, r4 blr instead of: _test2: mr r2, r4 foo r2, r2 mr r3, r2 blr GCC produces: _test2: foo r4, r4 mr r3,r4 blr git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31366 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-31Compile CodeGen/PowerPC/fp-branch.ll to:Chris Lattner
_intcoord_cond_next55: LBB1_3: ;cond_next55 lis r2, ha16(LCPI1_0) lfs f0, lo16(LCPI1_0)(r2) fcmpu cr0, f1, f0 blt cr0, LBB1_2 ;cond_next62.exitStub LBB1_1: ;bb72.exitStub li r3, 1 blr LBB1_2: ;cond_next62.exitStub li r3, 0 blr instead of: _intcoord_cond_next55: LBB1_3: ;cond_next55 lis r2, ha16(LCPI1_0) lfs f0, lo16(LCPI1_0)(r2) fcmpu cr0, f1, f0 bge cr0, LBB1_1 ;bb72.exitStub LBB1_4: ;cond_next55 lis r2, ha16(LCPI1_0) lfs f0, lo16(LCPI1_0)(r2) fcmpu cr0, f1, f0 bnu cr0, LBB1_2 ;cond_next62.exitStub LBB1_1: ;bb72.exitStub li r3, 1 blr LBB1_2: ;cond_next62.exitStub li r3, 0 blr git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31330 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-31look through isunordered to inline it into branch blocks.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31328 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-31TargetLowering::isOperandValidForConstraintChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31319 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-31Turn an assert into an error message. This is commonly triggered whenChris Lattner
we don't support a specific constraint yet. When this happens, print the unsupported constraint. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31310 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-30Lower jumptable to BR_JT. The legalizer can lower it to a BRIND or let the ↵Evan Cheng
target custom lower it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31293 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-29fix Generic/2006-10-29-Crash.llChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31281 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-29Fix a load folding issue that Evan noticed: there is no need to export valuesChris Lattner
used by comparisons in the main block. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31279 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-28split critical edges more carefully and intelligently. In particular, criticalChris Lattner
edges whose destinations are not phi nodes don't bother us. Also, share split edges, since the split edge can't have a phi. This significantly reduces the complexity of generated code in some cases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31274 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-28Split *all* critical edges before isel. This resolves issues with spill codeChris Lattner
being inserted on unsplit critical edges, which introduces (sometimes large amounts of) partially dead spill code. This also fixes PR925 + CodeGen/Generic/switch-crit-edge-constant.ll git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31260 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-27Fix a bug in merged condition handling ↵Chris Lattner
(CodeGen/Generic/2006-10-27-CondFolding.ll). Add many fewer CFG edges and PHI node entries. If there is a switch which has the same block as multiple destinations, only add that block once as a successor/phi node (in the jumptable case) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31242 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-27remove debug codeChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31233 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-27Codegen cond&cond with two branches. This compiles (f.e.) ↵Chris Lattner
PowerPC/and-branch.ll to: cmpwi cr0, r4, 4 bgt cr0, LBB1_2 ;UnifiedReturnBlock LBB1_3: ;entry cmplwi cr0, r3, 0 bne cr0, LBB1_2 ;UnifiedReturnBlock instead of: cmpwi cr7, r4, 4 mfcr r2 addic r4, r3, -1 subfe r3, r4, r3 rlwinm r2, r2, 30, 31, 31 or r2, r2, r3 cmplwi cr0, r2, 0 bne cr0, LBB1_2 ;UnifiedReturnBlock LBB1_1: ;cond_true git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31232 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-27Turn conditions like x<Y|z==q into multiple blocks.Chris Lattner
This compiles Regression/CodeGen/X86/or-branch.ll into: _foo: subl $12, %esp call L_bar$stub movl 20(%esp), %eax movl 16(%esp), %ecx cmpl $5, %eax jl LBB1_1 #cond_true LBB1_3: #entry testl %ecx, %ecx jne LBB1_2 #UnifiedReturnBlock LBB1_1: #cond_true call L_bar$stub addl $12, %esp ret LBB1_2: #UnifiedReturnBlock addl $12, %esp ret instead of: _foo: subl $12, %esp call L_bar$stub movl 20(%esp), %eax movl 16(%esp), %ecx cmpl $4, %eax setg %al testl %ecx, %ecx setne %cl testb %cl, %al jne LBB1_2 #UnifiedReturnBlock LBB1_1: #cond_true call L_bar$stub addl $12, %esp ret LBB1_2: #UnifiedReturnBlock addl $12, %esp ret And on ppc to: cmpwi cr0, r29, 5 blt cr0, LBB1_1 ;cond_true LBB1_3: ;entry cmplwi cr0, r30, 0 bne cr0, LBB1_2 ;UnifiedReturnBlock instead of: cmpwi cr7, r4, 4 mfcr r2 addic r4, r3, -1 subfe r30, r4, r3 rlwinm r29, r2, 30, 31, 31 and r2, r29, r30 cmplwi cr0, r2, 0 bne cr0, LBB1_2 ;UnifiedReturnBlock git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31230 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-26For PR950:Reid Spencer
Make necessary changes to support DIV -> [SUF]Div. This changes llvm to have three division instructions: signed, unsigned, floating point. The bytecode and assembler are bacwards compatible, however. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31195 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-24visitSwitchCase knows how to insert conditional branches well. ChangeChris Lattner
visitBr to just call visitSwitchCase, eliminating duplicate logic. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31167 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-24Generalize CaseBlock a bit more:Chris Lattner
Rename LHSBB/RHSBB to TrueBB/FalseBB. Allow the RHS value to be null, in which case the LHS is treated as a bool. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31166 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-24generalize 'CaseBlock'. It really allows any comparison to be inserted.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31161 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-23Minor tweak. Instead of generating:Chris Lattner
movl 32(%esp), %eax cmpl $1, %eax je LBB1_1 #bb LBB1_4: #entry cmpl $2, %eax je LBB1_2 #bb2 jmp LBB1_3 #UnifiedReturnBlock LBB1_1: #bb notice that we would miss the fall through and emit this instead: movl 32(%esp), %eax cmpl $2, %eax je LBB1_2 #bb2 LBB1_4: #entry cmpl $1, %eax jne LBB1_3 #UnifiedReturnBlock LBB1_1: #bb git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31130 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-22Fix phi node updating for switches lowered to linear sequences of branches.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31125 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-22disable this code for now, it's not yet safely updating phi nodesChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31124 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-22Implement PR964 and Regression/CodeGen/Generic/SwitchLowering.llChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31119 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-20For PR950:Reid Spencer
This patch implements the first increment for the Signless Types feature. All changes pertain to removing the ConstantSInt and ConstantUInt classes in favor of just using ConstantInt. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31063 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-19Partially in response to PR926: insert the newly created machine basicBill Wendling
blocks into the basic block list when lowering the switch inst. into a binary tree of if-then statements. This allows the "visitSwitchCase" func to allow for fall-through behavior. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31057 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-16Pass AliasAnalysis thru to DAGCombiner.Jim Laskey
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30984 91177308-0d34-0410-b5e6-96231b3b80d8
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