Age | Commit message (Collapse) | Author |
|
modified.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102816 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
code, and to eliminate the need for the SelectionDAGBuilder
state to be live during CodeGenAndEmitDAG calls.
Call SDB->clear() before CodeGenAndEmitDAG calls instead of
before it, and move the CurDAG->clear() out of SelectionDAGBuilder,
which doesn't own the DAG, and into CodeGenAndEmitDAG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102814 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102810 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102661 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
entry block.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102653 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102602 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102590 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102585 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
entry block.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102581 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102573 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102558 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
instructions for function arguments early and insert them after instruction selection is done.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102554 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102463 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
of the dbg testsuite regressions. I don't think this is
really the right fix; this change exposed an existing problem
upstream somewhere.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102410 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102380 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
produces a comment on targets that support it, but
the Dwarf writer is not hooked up yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102372 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
into SelectionDAGBuilder itself.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102128 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
and into SelectionDAGBuilder and FastISel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102123 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
FunctionLoweringInfo, as it isn't SelectionDAG-specific. This isn't
completely natural, as PHI node state is not per-function but rather
per-basic-block, however there's currently no other convenient
per-basic-block state to group it with.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102109 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
SelectionDAG directory and into a new Analysis.cpp file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101975 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
into SelectionDAGBuilder. This avoids a separate pass over the
instructions, and has the side effect of providing debug location
information to the copy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101906 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
they end up doing nothing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101904 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
SelectionDAGBuilder, where it doesn't have to be as complicated.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101848 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
need it, just pass around the parent block of the current instruction
explicitly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101822 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
than just getting one through a TargetLowering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101802 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
SelectionDAG-specific.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101801 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101637 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
const_casts, and it reinforces the design of the Target classes being
immutable.
SelectionDAGISel::IsLegalToFold is now a static member function, because
PIC16 uses it in an unconventional way. There is more room for API
cleanup here.
And PIC16's AsmPrinter no longer uses TargetLowering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101635 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
Probably the best way to know that all getOperand() calls have been handled
is to replace that API instead of updating.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101579 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101480 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101478 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
with a fix for self-hosting
rotate CallInst operands, i.e. move callee to the back
of the operand array
the motivation for this patch are laid out in my mail to llvm-commits:
more efficient access to operands and callee, faster callgraph-construction,
smaller compiler binary
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101465 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101434 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
with a fix
rotate CallInst operands, i.e. move callee to the back
of the operand array
the motivation for this patch are laid out in my mail to llvm-commits:
more efficient access to operands and callee, faster callgraph-construction,
smaller compiler binary
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101397 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101368 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
of the operand array
the motivation for this patch are laid out in my mail to llvm-commits:
more efficient access to operands and callee, faster callgraph-construction,
smaller compiler binary
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101364 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101342 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101334 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101276 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
SelectionDAGBuilder. FunctionLoweringInfo isn't an ideal place for
them to live, but it's better than SelectionDAGBuilder for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101267 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101266 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100824 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
readability.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100756 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
so the user at least knows what inline asm is a problem. For example:
error: inline asm not supported yet: don't know how to handle tied indirect register inputs
pr8788-1.c:14:10: note: generated from here
asm ("\n" : "+r" (stack->regs)
^
Instead of:
fatal error: error in backend: Don't know how to handle tied indirect register inputs yet!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100731 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100725 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100709 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
1. Introduce some enums and accessors in the InlineAsm class
that eliminate a ton of magic numbers when handling inline
asm SDNode.
2. Add a new MDNodeSDNode selection dag node type that holds
a MDNode (shocking!)
3. Add a new argument to ISD::INLINEASM nodes that hold !srcloc
metadata, propagating it to the instruction emitter, which
drops it.
No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100605 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100419 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100382 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
Added support for address spaces and added a isVolatile field to memcpy, memmove, and memset,
e.g., llvm.memcpy.i32(i8*, i8*, i32, i32) -> llvm.memcpy.p0i8.p0i8.i32(i8*, i8*, i32, i32, i1)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100304 91177308-0d34-0410-b5e6-96231b3b80d8
|