| Age | Commit message (Expand) | Author |
|---|
| 2013-03-07 | pre-RA-sched debug-only fix | Andrew Trick |
| 2013-03-07 | pre-RA-sched assertion fix. This bug was exposed by r176037. | Andrew Trick |
| 2013-02-25 | pre-RA-sched fix: only reevaluate physreg interferences when necessary. | Andrew Trick |
| 2013-01-29 | Add a special handling case for untyped CopyFromReg node in GetCostForDef() o... | Weiming Zhao |
| 2013-01-02 | Move all of the header files which are involved in modelling the LLVM IR | Chandler Carruth |
| 2012-12-13 | Change TargetLowering::getRepRegClassFor to take an MVT, instead of | Patrik Hagglund |
| 2012-12-11 | Revert EVT->MVT changes, r169836-169851, due to buildbot failures. | Patrik Hagglund |
| 2012-12-11 | Change TargetLowering::getRepRegClassFor to take an MVT, instead of | Patrik Hagglund |
| 2012-12-03 | Use the new script to sort the includes of every file under lib. | Chandler Carruth |
| 2012-11-12 | misched: Infrastructure for weak DAG edges. | Andrew Trick |
| 2012-11-06 | ScheduleDAG interface. Added OrderKind to distinguish nonregister dependencies. | Andrew Trick |
| 2012-10-08 | Move TargetData to DataLayout. | Micah Villmow |
| 2012-09-11 | Release build: guard dump functions with | Manman Ren |
| 2012-09-06 | Release build: guard dump functions with "ifndef NDEBUG" | Manman Ren |
| 2012-09-06 | Add a new optimization pass: Stack Coloring, that merges disjoint static allo... | Nadav Rotem |
| 2012-07-23 | Fix a typo (the the => the) | Sylvestre Ledru |
| 2012-06-05 | sdsched: Use the right heuristics when -mcpu is not provided and we have no i... | Andrew Trick |
| 2012-06-01 | Switch all register list clients to the new MC*Iterator interface. | Jakob Stoklund Olesen |
| 2012-05-24 | Mark some static arrays as const. | Craig Topper |
| 2012-05-07 | Add an MF argument to TRI::getPointerRegClass() and TII::getRegClass(). | Jakob Stoklund Olesen |
| 2012-03-22 | Source order scheduler should not preschedule nodes with multiple uses. rdar:... | Evan Cheng |
| 2012-03-08 | Use uint16_t to store instruction implicit uses and defs. Reduces static data. | Craig Topper |
| 2012-03-07 | misched preparation: rename core scheduler methods for consistency. | Andrew Trick |
| 2012-03-07 | misched preparation: modularize schedule printing. | Andrew Trick |
| 2012-03-07 | misched preparation: modularize schedule verification. | Andrew Trick |
| 2012-03-04 | Use uint16_t to store register overlaps to reduce static data. | Craig Topper |
| 2012-02-13 | Add register mask support to ScheduleDAGRRList. | Jakob Stoklund Olesen |
| 2011-12-07 | Make sure we correctly set LiveRegGens when a call is unscheduled. <rdar://p... | Eli Friedman |
| 2011-12-07 | Fix an assertion in the scheduler. PR11386. No testcase included because it... | Eli Friedman |
| 2011-12-07 | These global variables aren't thread-safe, STATISTIC is. Andy Trick tells me | Nick Lewycky |
| 2011-11-16 | Rename MVT::untyped to MVT::Untyped to match similar nomenclature. | Owen Anderson |
| 2011-11-15 | Added custom lowering for load->dec->store sequence in x86 when the EFLAGS re... | Pete Cooper |
| 2011-11-10 | Use a bigger hammer to fix PR11314 by disabling the "forcing two-address | Evan Cheng |
| 2011-11-09 | Speculatively revert commit 144124 (djg) in the hope that the 32 bit | Duncan Sands |
| 2011-11-08 | Add a hack to the scheduler to disable pseudo-two-address dependencies in | Dan Gohman |
| 2011-11-03 | Reapply r143206, with fixes. Disallow physical register lifetimes | Dan Gohman |
| 2011-10-29 | Revert r143206, as there are still some failing tests. | Dan Gohman |
| 2011-10-28 | Reapply r143177 and r143179 (reverting r143188), with scheduler | Dan Gohman |
| 2011-10-28 | Speculatively disable Dan's commits 143177 and 143179 to see if | Duncan Sands |
| 2011-10-28 | Eliminate LegalizeOps' LegalizedNodes map and have it just call RAUW | Dan Gohman |
| 2011-10-24 | Change this overloaded use of Sched::Latency to be an overloaded | Dan Gohman |
| 2011-10-21 | Remove a now dead function, fixing -Wunused-function warnings from | Chandler Carruth |
| 2011-10-20 | Delete the list-tdrr scheduler. Top-down schedulers are going away | Dan Gohman |
| 2011-09-01 | PreRA scheduler should avoid cloning compares. | Andrew Trick |
| 2011-06-28 | - Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo and | Evan Cheng |
| 2011-06-27 | More refactoring. Move getRegClass from TargetOperandInfo to TargetInstrInfo. | Evan Cheng |
| 2011-06-27 | pre-RA-sched: Cleanup register pressure tracking. | Andrew Trick |
| 2011-06-27 | Distinguish early clobber output operands from clobbered registers. | Jakob Stoklund Olesen |
| 2011-06-21 | Fix some trailing issues from my introduction of MVT::untyped and its use for... | Owen Anderson |
| 2011-06-18 | Remove unused but set variables. | Benjamin Kramer |
