Age | Commit message (Expand) | Author |
2010-07-26 | The "excess register pressure" returned by HighRegPressure() is not accurate ... | Evan Cheng |
2010-07-26 | Pacify gcc-4.5 which wrongly thinks that RExcess (passed as the Excess parame... | Duncan Sands |
2010-07-25 | Add comments. | Evan Cheng |
2010-07-25 | Fix crashes when scheduling a CopyToReg node -- getMachineOpcode asserts on | Bob Wilson |
2010-07-24 | Add an ILP scheduler. This is a register pressure aware scheduler that's | Evan Cheng |
2010-07-23 | - Allow target to specify when is register pressure "too high". In most cases, | Evan Cheng |
2010-07-22 | Re-apply r109079 with fix. | Evan Cheng |
2010-07-22 | Revert r109079, which broke a lot of CodeGen tests. | Owen Anderson |
2010-07-22 | Initialize RegLimit only when register pressure is being tracked. | Evan Cheng |
2010-07-21 | More register pressure aware scheduling work. | Evan Cheng |
2010-07-21 | Teach bottom up pre-ra scheduler to track register pressure. Work in progress. | Evan Cheng |
2010-06-29 | Add a VT argument to getMinimalPhysRegClass and replace the copy related uses | Rafael Espindola |
2010-05-30 | Use `llvm::next' instead of `next' to make VC++ 2010 happy. | Oscar Fuentes |
2010-05-28 | Fix some latency computation bugs: if the use is not a machine opcode do not ... | Evan Cheng |
2010-05-26 | Eliminate the use of PriorityQueue and just use a std::vector, | Dan Gohman |
2010-05-26 | Delete an unused function. | Dan Gohman |
2010-05-26 | Change push_all to a non-virtual function and implement it in the | Dan Gohman |
2010-05-21 | Rename -pre-RA-sched=hybrid to -pre-RA-sched=list-hybrid. | Evan Cheng |
2010-05-20 | Allow targets more controls on what nodes are scheduled by reg pressure, what... | Evan Cheng |
2010-05-20 | Add a hybrid bottom up scheduler that reduce register usage while avoiding | Evan Cheng |
2010-04-07 | Three changes: | Chris Lattner |
2010-02-09 | move target-independent opcodes out of TargetInstrInfo | Chris Lattner |
2010-02-05 | When the scheduler unfold a load folding instruction it move some of the pred... | Evan Cheng |
2010-01-23 | Remove the '-disable-scheduling' flag and replace it with the 'source' option of | Bill Wendling |
2010-01-06 | The previous code could potentially cause a cycle. Allow ordering w.r.t. a 0 ... | Bill Wendling |
2010-01-06 | Only check the ordering if there is an ordering for each nodes. | Bill Wendling |
2010-01-05 | Add a semi-primitive form of scheduling via the "SDNode ordering" to the | Bill Wendling |
2010-01-05 | Change errs() to dbgs(). | David Greene |
2009-10-25 | Remove includes of Support/Compiler.h that are no longer needed after the | Nick Lewycky |
2009-10-25 | Remove VISIBILITY_HIDDEN from class/struct found inside anonymous namespaces. | Nick Lewycky |
2009-10-09 | The ScheduleDAG framework now requires an AliasAnalysis argument, though | Dan Gohman |
2009-09-30 | Silence comparison always false warning in -Asserts mode. | Reid Kleckner |
2009-09-30 | Fix integer overflow in instruction scheduling. This can happen if we have | Reid Kleckner |
2009-08-23 | eliminate uses of cerr() | Chris Lattner |
2009-08-23 | remove a few DOUTs here and there. | Chris Lattner |
2009-08-11 | Split EVT into MVT and EVT, the former representing _just_ a primitive type, ... | Owen Anderson |
2009-08-10 | Rename MVT to EVT, in preparation for splitting SimpleValueType out into its ... | Owen Anderson |
2009-07-14 | llvm_unreachable->llvm_unreachable(0), LLVM_UNREACHABLE->llvm_unreachable. | Torok Edwin |
2009-07-11 | assert(0) -> LLVM_UNREACHABLE. | Torok Edwin |
2009-04-29 | Instead of passing in an unsigned value for the optimization level, use an enum, | Bill Wendling |
2009-04-29 | Second attempt: | Bill Wendling |
2009-04-28 | r70270 isn't ready yet. Back this out. Sorry for the noise. | Bill Wendling |
2009-04-28 | Massive check in. This changes the "-fast" flag to "-O#" in llc. If you want to | Bill Wendling |
2009-04-16 | In the list-burr's pseudo two-addr dependency heuristics, don't | Dan Gohman |
2009-04-16 | Handle SUBREG_TO_REG instructions with the same heuristics | Dan Gohman |
2009-03-24 | Minor compile-time optimization; don't bother checking | Dan Gohman |
2009-03-24 | Add a pre-pass to the burr-list scheduler which makes adjustments to | Dan Gohman |
2009-03-23 | When unfolding a load during scheduling, the new operator node has | Dan Gohman |
2009-03-23 | Fix canClobberPhysRegDefs to check all SDNodes grouped together | Dan Gohman |
2009-03-20 | For inline asm output operand that matches an input. Encode the input operand... | Evan Cheng |