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path: root/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
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2006-05-12Refactor a bunch of includes so that TargetMachine.h doesn't have to includeOwen Anderson
TargetData.h. This should make recompiles a bit faster with my current TargetData tinkering. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28238 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-12Duh. That could take a long time.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28235 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-12Add capability to scheduler to commute nodes for profit.Evan Cheng
If a two-address code whose first operand has uses below, it should be commuted when possible. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28230 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-11Refactor scheduler code. Move register-reduction list scheduler to aEvan Cheng
separate file. Added an initial implementation of top-down register pressure reduction list scheduler. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28226 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-04Remove and simplify some more machineinstr/machineoperand stuff.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28105 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-04Rename MO_VirtualRegister -> MO_Register. Clean up immediate handling.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28104 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-04Remove a bunch more SparcV9 specific stuffChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28093 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-03Refactor TargetMachine, pushing handling of TargetData into the ↵Owen Anderson
target-specific subclasses. This has one caller-visible change: getTargetData() now returns a pointer instead of a reference. This fixes PR 759. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28074 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-22JumpTable support! What this represents is working asm and jit support forNate Begeman
x86 and ppc for 100% dense switch statements when relocations are non-PIC. This support will be extended and enhanced in the coming days to support PIC, and less dense forms of jump tables. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27947 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-24fix spelloChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27053 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-20TargetData doesn't know the alignment of vectors :(Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26884 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-10Move some simple-sched-specific instance vars to the simple scheduler.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26690 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-10prune #includesChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26689 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-10move some simple scheduler methods into the simple schedulerChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26688 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-10Make EmitNode take a SDNode instead of a NodeInfo*Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26687 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-10Move the VRBase field from NodeInfo to being a separate, explicit, map.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26686 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-10Push PrepareNodeInfo/IdentifyGroups down the inheritance hierarchyChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26682 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-08Change the interface for getting a target HazardRecognizer to be more clean.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26608 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-05When a hazard recognizer needs noops to be inserted, do so. This representsChris Lattner
noops as null pointers in the instruction sequence. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26564 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-25Added an offset field to ConstantPoolSDNode.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26371 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-24Pass all the flags to the asm printer, not just the # operands.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26362 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-24rename NumOps -> NumVals to avoid shadowing a NumOps var in an outer scope.Chris Lattner
Add support for addressing modes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26361 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-24Refactor operand adding out to a new AddOperand methodChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26358 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-23Record all of the expanded registers in the DAG and machine instr, fixingChris Lattner
several bugs in inline asm expanded operands. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26332 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-09Make MachineConstantPool entries alignments explicitChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26071 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-04Fix VC++ warning.Jeff Cohen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25975 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-04Get rid of some memory leaks identified by ValgrindEvan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25960 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-04Add initial support for immediates. This allows us to compile this:Chris Lattner
int %rlwnm(int %A, int %B) { %C = call int asm "rlwnm $0, $1, $2, $3, $4", "=r,r,r,n,n"(int %A, int %B, int 4, int 17) ret int %C } into: _rlwnm: or r2, r3, r3 or r3, r4, r4 rlwnm r2, r2, r3, 4, 17 ;; note the immediates :) or r3, r2, r2 blr git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25955 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-31Allow the specification of explicit alignments for constant pool entries.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25855 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-31Handle physreg input/outputs. We now compile this:Chris Lattner
int %test_cpuid(int %op) { %B = alloca int %C = alloca int %D = alloca int %A = call int asm "cpuid", "=eax,==ebx,==ecx,==edx,eax"(int* %B, int* %C, int* %D, int %op) %Bv = load int* %B %Cv = load int* %C %Dv = load int* %D %x = add int %A, %Bv %y = add int %x, %Cv %z = add int %y, %Dv ret int %z } to this: _test_cpuid: sub %ESP, 16 mov DWORD PTR [%ESP], %EBX mov %EAX, DWORD PTR [%ESP + 20] cpuid mov DWORD PTR [%ESP + 8], %ECX mov DWORD PTR [%ESP + 12], %EBX mov DWORD PTR [%ESP + 4], %EDX mov %ECX, DWORD PTR [%ESP + 12] add %EAX, %ECX mov %ECX, DWORD PTR [%ESP + 8] add %EAX, %ECX mov %ECX, DWORD PTR [%ESP + 4] add %EAX, %ECX mov %EBX, DWORD PTR [%ESP] add %ESP, 16 ret ... note the proper register allocation. :) it is unclear to me why the loads aren't folded into the adds. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25827 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-26Teach the scheduler to emit the appropriate INLINEASM MachineInstr for anChris Lattner
ISD::INLINEASM node. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25668 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-25No need to keep track of top and bottom nodes in a group since the vector isEvan Cheng
already in order. Thanks Jim for pointing it out. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25608 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-25Keep track of bottom / top element of a set of flagged nodes.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25600 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-23Factor out more instruction scheduler code to the base class.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25532 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-21Do some code refactoring on Jim's scheduler in preparation of the new listEvan Cheng
scheduler. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25493 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-29purity++Duraid Madina
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25041 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-21Disengage DEBUG_LOC from non-PPC targets.Jim Laskey
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24919 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-19Amend comment.Jim Laskey
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24861 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-19Create a strong dependency for loads following stores. This will leave aJim Laskey
latency period between the two. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24860 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-18Keep VC++ happy.Jeff Cohen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24835 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-18Fix a bug Sabre was having where the DAG root was a group. The group dominatorJim Laskey
needed to be added to the ordering list, not the first member of the group. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24816 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-18Groups were not emitted if the dominator node and the node in the ordering listJim Laskey
were not the same node. Ultimately the test was bogus. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24815 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-18Simplify codeChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24806 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-01Support multiple ValueTypes per RegisterClass, needed for upcoming vectorNate Begeman
work. This change has no effect on generated code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24563 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-30Added an index field to GlobalAddressSDNode so it can represent X+12, etc.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24523 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-09Switch the allnodes list from a vector of pointers to an ilist of nodes.This ↵Chris Lattner
eliminates the vector, allows constant time removal of a node froma graph, and makes iteration over the all nodes list stable when adding nodes to the graph. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24263 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-08Explicitly initialize some instance varsChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24247 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-07Let's try ignoring resource utilization on the backward pass.Jim Laskey
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24231 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-05Fix logic bug in finding retry slot in tally.Jim Laskey
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24188 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-04Fix a warningJim Laskey
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24187 91177308-0d34-0410-b5e6-96231b3b80d8