| Age | Commit message (Expand) | Author |
|---|
| 2013-01-02 | Move all of the header files which are involved in modelling the LLVM IR | Chandler Carruth |
| 2012-12-20 | Use MachineInstrBuilder in InstrEmitter. | Jakob Stoklund Olesen |
| 2012-12-13 | Change TargetLowering::getRegClassFor to take an MVT, instead of EVT. | Patrik Hagglund |
| 2012-12-11 | Revert EVT->MVT changes, r169836-169851, due to buildbot failures. | Patrik Hagglund |
| 2012-12-11 | Change TargetLowering::getRegClassFor to take an MVT, instead of EVT. | Patrik Hagglund |
| 2012-12-03 | Use the new script to sort the includes of every file under lib. | Chandler Carruth |
| 2012-10-30 | [inline asm] Get the mayLoad/mayStore directly from the MIOp_ExtraInfo operand. | Chad Rosier |
| 2012-10-30 | [inline asm] Implement mayLoad and mayStore for inline assembly. In general, | Chad Rosier |
| 2012-10-08 | Move TargetData to DataLayout. | Micah Villmow |
| 2012-09-12 | Fix PR11985 | Michael Liao |
| 2012-09-12 | Remove an overly-aggressive assertion. The code following this assertion alr... | Owen Anderson |
| 2012-09-06 | Add a new optimization pass: Stack Coloring, that merges disjoint static allo... | Nadav Rotem |
| 2012-08-31 | Add MachineInstr::tieOperands, remove setIsTied(). | Jakob Stoklund Olesen |
| 2012-08-31 | Don't enforce ordered inline asm operands. | Jakob Stoklund Olesen |
| 2012-08-29 | Verify the order of tied operands in inline asm. | Jakob Stoklund Olesen |
| 2012-08-29 | Set the isTied flags when building INLINEASM MachineInstrs. | Jakob Stoklund Olesen |
| 2012-08-24 | Avoid including explicit uses when counting SDNode imp-uses. | Jakob Stoklund Olesen |
| 2012-08-07 | Add SelectionDAG::getTargetIndex. | Jakob Stoklund Olesen |
| 2012-07-11 | InstrEmitter::EmitSubregNode() optimize extract_subreg in this case: | Evan Cheng |
| 2012-07-04 | Allow trailing physreg RegisterSDNode operands on non-variadic instructions. | Jakob Stoklund Olesen |
| 2012-06-29 | Clear kill flags in InstrEmitter::EmitSubregNode(). | Jakob Stoklund Olesen |
| 2012-05-07 | Add an MF argument to TRI::getPointerRegClass() and TII::getRegClass(). | Jakob Stoklund Olesen |
| 2012-05-03 | Added TargetRegisterInfo::getAllocatableClass. | Andrew Trick |
| 2012-02-24 | Don't crash when a glue node contains an internal CopyToReg | Hal Finkel |
| 2012-02-03 | Handle all live physreg defs in the same place. | Jakob Stoklund Olesen |
| 2012-01-20 | More dead code removal (using -Wunreachable-code) | David Blaikie |
| 2012-01-18 | Add a RegisterMaskSDNode class. | Jakob Stoklund Olesen |
| 2012-01-18 | Fix ISD::REG_SEQUENCE to accept physical registers and change TwoAddressInstr... | Pete Cooper |
| 2011-12-07 | Add bundle aware API for querying instruction properties and switch the code | Evan Cheng |
| 2011-10-05 | Simplify EXTRACT_SUBREG emission. | Jakob Stoklund Olesen |
| 2011-10-05 | Simplify INSERT_SUBREG emission. | Jakob Stoklund Olesen |
| 2011-09-30 | Move getCommonSubClass() into TRI. | Jakob Stoklund Olesen |
| 2011-09-22 | Constrain register classes instead of emitting copies. | Jakob Stoklund Olesen |
| 2011-09-21 | Lower ARM adds/subs to add/sub after adding optional CPSR operand. | Andrew Trick |
| 2011-09-20 | Restore hasPostISelHook tblgen flag. | Andrew Trick |
| 2011-09-20 | ARM isel bug fix for adds/subs operands. | Andrew Trick |
| 2011-09-20 | whitespace | Andrew Trick |
| 2011-08-30 | Follow up to r138791. | Evan Cheng |
| 2011-07-18 | land David Blaikie's patch to de-constify Type, with a few tweaks. | Chris Lattner |
| 2011-06-28 | - Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo and | Evan Cheng |
| 2011-06-27 | More refactoring. Move getRegClass from TargetOperandInfo to TargetInstrInfo. | Evan Cheng |
| 2011-06-27 | Distinguish early clobber output operands from clobbered registers. | Jakob Stoklund Olesen |
| 2011-06-24 | Handle debug info for i128 constants. | Devang Patel |
| 2011-06-16 | Don't use register classes larger than TLI->getRegClassFor(VT). | Jakob Stoklund Olesen |
| 2011-06-16 | Change the REG_SEQUENCE SDNode to take an explict register class ID as its fi... | Owen Anderson |
| 2011-06-02 | Use TRI::has{Sub,Super}ClassEq() where possible. | Jakob Stoklund Olesen |
| 2011-01-10 | Simplify a bunch of isVirtualRegister() and isPhysicalRegister() logic. | Jakob Stoklund Olesen |
| 2011-01-07 | Do not model all INLINEASM instructions as having unmodelled side effects. | Evan Cheng |
| 2011-01-05 | Optimize: | Evan Cheng |
| 2010-12-23 | flags -> glue for selectiondag | Chris Lattner |
