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path: root/lib/CodeGen/ScheduleDAGInstrs.cpp
AgeCommit message (Expand)Author
2011-01-07Do not model all INLINEASM instructions as having unmodelled side effects.Evan Cheng
2010-12-15Move Value::getUnderlyingObject to be a standaloneDan Gohman
2010-11-03Two sets of changes. Sorry they are intermingled.Evan Cheng
2010-10-27Putting r117193 back except for the compile time cost. Rather than assuming f...Evan Cheng
2010-10-25Neuter r117193 as it causes significant post-ra scheduler compile time regres...Evan Cheng
2010-10-23Properly model the latency of register defs which are 1) function returns orEvan Cheng
2010-10-08Avoid compiler warning: comparison between signed and unsigned integer.Evan Cheng
2010-10-08Fix operand latency computation in cases where the definition operand isEvan Cheng
2010-10-06Remove unused variables.Nick Lewycky
2010-10-06- Add TargetInstrInfo::getOperandLatency() to compute operand latencies. ThisEvan Cheng
2010-09-29Model Cortex-a9 load to SUB, RSB, ADD, ADC, SBC, RSC, CMN, MVN, or CMPEvan Cheng
2010-09-10Teach if-converter to be more careful with predicating instructions that wouldEvan Cheng
2010-07-24Change ScheduleDAGInstrs::Defs and ::Uses to be variable-size vectorsBob Wilson
2010-07-15Use std::vector instead of TargetRegisterInfo::FirstVirtualRegister.Bill Wendling
2010-05-19Fix the post-RA instruction scheduler to handle instructions referenced byJim Grosbach
2010-05-01Get rid of the EdgeMapping map. Instead, just check for BasicBlockDan Gohman
2010-04-17Fix -Wcast-qual warnings.Dan Gohman
2010-03-22Reduce indentation.Evan Cheng
2010-03-2280 col violation.Evan Cheng
2010-03-10Progress towards shepherding debug info through SelectionDAG.Dale Johannesen
2010-02-16There are two ways of checking for a given type, for example isa<PointerType>(T)Duncan Sands
2009-11-09Fix dependencies added to model memory aliasing for post-RA scheduling. The d...David Goodwin
2009-11-05Correctly add chain dependencies around calls and unknown-side-effect instruc...David Goodwin
2009-11-03<rdar://problem/7352605>. When building schedule graph use mayAlias informati...David Goodwin
2009-11-02Chain dependencies used to enforce memory order should have latency of 0 (exc...David Goodwin
2009-10-26When checking whether a def of an aliased register is dead, ask theDan Gohman
2009-10-18Spill slots cannot alias.Evan Cheng
2009-10-18-Revert parts of 84326 and 84411. Distinquishing between fixed and non-fixedEvan Cheng
2009-10-09Factor out LiveIntervalAnalysis' code to determine whether an instructionDan Gohman
2009-10-07Replace TargetInstrInfo::isInvariantLoad and its target-specificDan Gohman
2009-09-25Improve MachineMemOperand handling.Dan Gohman
2009-09-18Enhance EmitInstrWithCustomInserter() so target can specify CFG changes that ...Evan Cheng
2009-08-19Use the schedule itinerary operand use/def cycle information to adjust depend...David Goodwin
2009-08-13Add callback to allow target to adjust latency of schedule dependency edge.David Goodwin
2009-08-10Post RA scheduler changes. Introduce a hazard recognizer that uses the target...David Goodwin
2009-08-07Fix a typo in a comment.Dan Gohman
2009-07-17Eliminate yet another copy of getOpcode.Dan Gohman
2009-07-13Move isLCSSAForm, isLoopInvariant, getCanonicalInductionVariable,Dan Gohman
2009-02-11When scheduling a block in parts, keep track of the overallDan Gohman
2009-02-10Factor out more code for computing register live-range informationforDan Gohman
2009-02-06Move ScheduleDAGInstrs.h to be a private header. Front-endsDan Gohman
2009-01-30Fix a post-RA scheduling dependency bug.Dan Gohman
2009-01-16Instead of adding dependence edges between terminator instructionsDan Gohman
2009-01-15Move a few containers out of ScheduleDAGInstrs::BuildSchedGraphDan Gohman
2008-12-23Clean up the atomic opcodes in SelectionDAG.Dan Gohman
2008-12-23Rename BuildSchedUnits to BuildSchedGraph, and refactor theDan Gohman
2008-12-23Use isTerminator() instead of isBranch()||isReturn() inDan Gohman
2008-12-16Add initial support for back-scheduling address computations,Dan Gohman
2008-12-16Fix some register-alias-related bugs in the post-RA scheduler livenessDan Gohman
2008-12-16Add a simple target-independent heuristic to allow targets with noDan Gohman