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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10728 91177308-0d34-0410-b5e6-96231b3b80d8
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a) remove opIsUse(), opIsDefOnly(), opIsDefAndUse()
b) add isUse(), isDef()
c) rename opHiBits32() to isHiBits32(),
opLoBits32() to isLoBits32(),
opHiBits64() to isHiBits64(),
opLoBits64() to isLoBits64().
This results to much more readable code, for example compare
"op.opIsDef() || op.opIsDefAndUse()" to "op.isDef()" a pattern used
very often in the code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10461 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@9903 91177308-0d34-0410-b5e6-96231b3b80d8
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* Doxygen-ify comments
* Make code layout more consistent
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@9431 91177308-0d34-0410-b5e6-96231b3b80d8
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Header files will be on the way.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@9298 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@8297 91177308-0d34-0410-b5e6-96231b3b80d8
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adding std:: namespace qualifiers
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@8295 91177308-0d34-0410-b5e6-96231b3b80d8
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info (since multiple reg types may share the same reg class).
(2) Remove machine-specific regalloc. methods that are no longer needed.
In particular, arguments and return value from a call do not need
machine-specific code for allocation.
(3) Rename TargetRegInfo::getRegType variants to avoid unintentional
overloading when an include file is omitted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7329 91177308-0d34-0410-b5e6-96231b3b80d8
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call arguments and return values:
Now all copy operations before and after a call are generated during
selection instead of during register allocation.
The values are copied to virtual registers (or to the stack), but
in the former case these operands are marked with the correct physical
registers according to the calling convention.
Although this complicates scheduling and does not work well with
live range analysis, it simplifies the machine-dependent part of
register allocation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6465 91177308-0d34-0410-b5e6-96231b3b80d8
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Fixed spilling of %fcc[0-3] which are part of %fsr.
(2) Moved some machine-independent reg-class code to class TargetRegInfo
from SparcReg{Class,}Info.
(3) Renamed MachienOperand::opIsDef to MachineOperand::opIsDefOnly()
and related functions and flags. Fixed several bugs where only
"isDef" was being checked, not "isDefAndUse".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6341 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5272 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4382 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4380 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4344 91177308-0d34-0410-b5e6-96231b3b80d8
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MachineOperand::getType()
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4331 91177308-0d34-0410-b5e6-96231b3b80d8
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llvm/Target/MachineInstrInfo.h
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4327 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4323 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4317 91177308-0d34-0410-b5e6-96231b3b80d8
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created here, simply by handling all implicit operands (which should
have been done anyway).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@3969 91177308-0d34-0410-b5e6-96231b3b80d8
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than #available regs, compute the sum excluding duplicates and if that
is less than #regs, go ahead and coalesce.
Add method IGNode::getCombinedDegree to count excluding duplicates.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@3842 91177308-0d34-0410-b5e6-96231b3b80d8
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debug output.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@3724 91177308-0d34-0410-b5e6-96231b3b80d8
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because operands may be modified directly to set register.
Also, class MachineCodeForBasicBlock is now an annotation on BasicBlock.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@2832 91177308-0d34-0410-b5e6-96231b3b80d8
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For details, See: docs/2002-06-25-MegaPatchInfo.txt
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@2779 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@2397 91177308-0d34-0410-b5e6-96231b3b80d8
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class. The Method class is obsolete (renamed) and all references to it
are being converted over to Function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@2144 91177308-0d34-0410-b5e6-96231b3b80d8
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Method::inst_* is now in llvm/Support/InstIterator.h
GraphTraits specializations for BasicBlock and Methods are now in llvm/Support/CFG.h
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* Removal dependencies on Type.h & remove uses of getTypeID()
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function in the one .cpp file that uses it. Use ValueSet's instead.
* Prepare to delete LiveVarSet.h & LiveVarSet.cpp
* Eliminate the ValueSet class, making all old member functions into global
templates that will eventually be moved to Support.
* Eliminate some irrelevant const's
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1712 91177308-0d34-0410-b5e6-96231b3b80d8
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* Introduce RAV to allow stream I/O instead of using printValue
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1710 91177308-0d34-0410-b5e6-96231b3b80d8
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* ValueSet interface converted from add/remove to insert/erase
* Minor cleanups
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1689 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1503 91177308-0d34-0410-b5e6-96231b3b80d8
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Added correct spill candidate selection logic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1493 91177308-0d34-0410-b5e6-96231b3b80d8
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Renamed op_const_iterator -> const_op_iterator
Renamed PointerType::getValueType() -> PointerType::getElementType()
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1408 91177308-0d34-0410-b5e6-96231b3b80d8
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regClass since FP class has two reg Types.
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generation
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Changed added instr to a deque (from a vector)
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* Spell PhyRegAlloc right.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@645 91177308-0d34-0410-b5e6-96231b3b80d8
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