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path: root/lib/CodeGen/PrologEpilogInserter.cpp
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2010-07-02Custom inserters (e.g., conditional moves in Thumb1 can introduceJim Grosbach
new basic blocks, and if used as a function argument, that can cause call frame setup / destroy pairs to be split across a basic block boundary. That prevents us from doing a simple assertion to check that the pairs match and alloc/ dealloc the same amount of space. Modify the assertion to only check the amount allocated when there are matching pairs in the same basic block. rdar://8022442 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107517 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-02Propagate the AlignStack bit in InlineAsm's to the Dale Johannesen
PrologEpilog code, and use it to determine whether the asm forces stack alignment or not. gcc consistently does not do this for GCC-style asms; Apple gcc inconsistently sometimes does it for asm blocks. There is no convenient place to put a bit in either the SDNode or the MachineInstr form, so I've added an extra operand to each; unlovely, but it does allow for expansion for more bits, should we need it. PR 5125. Some existing testcases are affected. The operand lists of the SDNode and MachineInstr forms are indexed with awesome mnemonics, like "2"; I may fix this someday, but not now. I'm not making it any worse. If anyone is inspired I think you can find all the right places from this patch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107506 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-02Remove the TargetRegisterClass member from CalleeSavedInfoRafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105344 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-02Remove uses of getCalleeSavedRegClasses from outside theRafael Espindola
backends and removes the virtual declaration. With that out of the way I should be able to cleanup one backend at a time. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105321 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-22Implement @llvm.returnaddress. rdar://8015977.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104421 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-14Rename "HasCalls" in MachineFrameInfo to "AdjustsStack" to better describe whatBill Wendling
the variable actually tracks. N.B., several back-ends are using "HasCalls" as being synonymous for something that adjusts the stack. This isn't 100% correct and should be looked into. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103802 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-06Add argument TargetRegisterInfo to loadRegFromStackSlot and storeRegToStackSlot.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103193 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-03Reword a comment slightly.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102966 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-29Make naked functions work on PPC.Dale Johannesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102657 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-13Rename MachineFrameInfo variables to MFI, for consistency withDan Gohman
the rest of CodeGen. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101146 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-05remove the MMI pointer from MachineFrameInfo.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100415 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-10Clear up the last (famous last words) frame index value reuse issues for Thumb1.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98109 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-09Change the Value argument to eliminateFrameIndex to a type-tagged value. ThisJim Grosbach
is preparatory to having PEI's scavenged frame index value reuse logic properly distinguish types of frame values (e.g., whether the value is stack-pointer relative or frame-pointer relative). No functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98086 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-22Updated version of r96634 (which was reverted due to failing 176.gcc andJim Grosbach
126.gcc nightly tests. These failures uncovered latent bugs that machine DCE could remove one half of a stack adjust down/up pair, causing PEI to assert. This update fixes that, and the tests now pass. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96822 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-19Revert 96634. It causes assertion failures for 126.gcc and 176.gcc inBob Wilson
the armv6 nightly tests. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96691 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-19Radar 7636153. In the presence of large call frames, it's not sufficientJim Grosbach
for ARM to just check if a function has a FP to determine if it's safe to simplify the stack adjustment pseudo ops prior to eliminating frame indices. Allow targets to override the default behavior and does so for ARM and Thumb2. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96634 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-13Teach MachineFrameInfo to track maximum alignment while stack objects are beingEvan Cheng
created. This ensures it's updated at all time. It means targets which perform dynamic stack alignment would know whether it is required and whether frame pointer register cannot be made available register allocation. This is a fix for rdar://7625239. Sorry, I can't create a reasonably sized test case. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96069 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-09move target-independent opcodes out of TargetInstrInfoChris Lattner
into TargetOpcodes.h. #include the new TargetOpcodes.h into MachineInstr. Add new inline accessors (like isPHI()) to MachineInstr, and start using them throughout the codebase. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95687 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-28Remove dead store.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92187 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-11Honour setHasCalls() set from isel.Anton Korobeynikov
This is used in some weird cases like general dynamic TLS model. This fixes PR5723 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91144 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-03improve portability to avoid conflicting with std::next in c++'0x.Chris Lattner
Patch by Howard Hinnant! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90365 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-12Add a bool flag to StackObjects telling whether they reference spillDavid Greene
slots. The AsmPrinter will use this information to determine whether to print a spill/reload comment. Remove default argument values. It's too easy to pass a wrong argument value when multiple arguments have default values. Make everything explicit to trap bugs early. Update all targets to adhere to the new interfaces.. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@87022 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-29When the function is doing dynamic stack realignment, the spill slot will beJim Grosbach
indexed via the stack pointer, even if a frame pointer is present. Update the heuristic to place it nearest the stack pointer in that case, rather than nearest the frame pointer. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85474 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-21Cleanup of frame index scavenging. Better code flow and more accuratelyJim Grosbach
handles T2 and ARM use cases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84761 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-20Better handle instructions that re-def a scratch registerJim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84657 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-20Register re-use for scavenged frame indices must check for re-deginitionJim Grosbach
of the register in the instruction which kills the scavenged value. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84641 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-20Enable post-pass frame index register scavenging for ARM and Thumb2Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84585 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-17Distinquish stack slots from other stack objects. They (and fixed objects) ↵Evan Cheng
get FixedStack PseudoSourceValues. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84326 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-14Make loop not recalc getNumOperands() each time aroundJim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84138 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-14quiet compiler warningJim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84133 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-09when previous scratch register is killed, flag the value as no longer trackingJim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83653 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-08Re-enable register scavenging in Thumb1 by default.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83521 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-08bugfix. The target may use virtual registers that aren't tracked for re-use ↵Jim Grosbach
but are allocated by the scavenger. The re-use algorithm needs to watch for that. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83519 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-07reverting thumb1 scavenging default due to test failure while I figure out ↵Jim Grosbach
what's up. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83501 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-07Enable thumb1 register scavenging by default.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83496 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-07grammarJim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83483 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-07add initializers for clarity. Add missing assignment of PrevLastUseOp.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83481 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-07Add register-reuse to frame-index register scavenging. When a target usesJim Grosbach
a virtual register to eliminate a frame index, it can return that register and the constant stored there to PEI to track. When scavenging to allocate for those registers, PEI then tracks the last-used register and value, and if it is still available and matches the value for the next index, reuses the existing value rather and removes the re-materialization instructions. Fancier tracking and adjustment of scavenger allocations to keep more values live for longer is possible, but not yet implemented and would likely be better done via a different, less special-purpose, approach to the problem. eliminateFrameIndex() is modified so the target implementations can return the registers they wish to be tracked for reuse. ARM Thumb1 implements and utilizes the new mechanism. All other targets are simply modified to adjust for the changed eliminateFrameIndex() prototype. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83467 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-30Add additional assert() to verify no extraneous use of a scavenged register.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83163 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-30replace TRI->isVirtualRegister() with TargetRegisterInfo::isVirtualRegister()Jim Grosbach
per customary usage git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83137 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-30fix compiler warningJim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83132 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-29Simplify the tracking of virtual frame index registers. Ranges cannot overlap,Jim Grosbach
so a simple "current register" will suffice. Also add some additional sanity-checking assertions to make sure things are as we expect. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83081 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-27Use explicit structs instead of std::pair to map callee saved regs to spill ↵Tilmann Scheller
slots. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82909 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-25pr4926: ARM requires the stack pointer to be aligned, even for leaf functions.Bob Wilson
For the AAPCS ABI, SP must always be 4-byte aligned, and at any "public interface" it must be 8-byte aligned. For the older ARM APCS ABI, the stack alignment is just always 4 bytes. For X86, we currently align SP at entry to a function (e.g., to 16 bytes for Darwin), but no stack alignment is needed at other times, such as for a leaf function. After discussing this with Dan, I decided to go with the approach of adding a new "TransientStackAlignment" field to TargetFrameInfo. This value specifies the stack alignment that must be maintained even in between calls. It defaults to 1 except for ARM, where it is 4. (Some other targets may also want to set this if they have similar stack requirements. It's not currently required for PPC because it sets targetHandlesStackFrameRounding and handles the alignment in target-specific code.) The existing StackAlignment value specifies the alignment upon entry to a function, which is how we've been using it anyway. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82767 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-24Start of revamping the register scavenging in PEI. ARM Thumb1 is the drivingJim Grosbach
interest for this, as it currently reserves a register rather than using the scavenger for matierializing constants as needed. Instead of scavenging registers on the fly while eliminating frame indices, new virtual registers are created, and then a scavenged collectively in a post-pass over the function. This isolates the bits that need to interact with the scavenger, and sets the stage for more intelligent use, and reuse, of scavenged registers. For the time being, this is disabled by default. Once the bugs are worked out, the current scavenging calls in replaceFrameIndices() will be removed and the post-pass scavenging will be the default. Until then, -enable-frame-index-scavenging enables the new code. Currently, only the Thumb1 back end is set up to use it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82734 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-24Fix a hypothetical problem for targets with StackGrowsUp and a non-zeroBob Wilson
LocalAreaOffset. (We don't have any of those right now.) PEI::calculateFrameObjectOffsets includes the absolute value of the LocalAreaOffset in the cumulative offset value used to calculate the stack frame size. It then adds the raw value of the LocalAreaOffset to the stack size. For a StackGrowsDown target, that raw value is negative and has the effect of cancelling out the absolute value that was added earlier, but that obviously won't work for a StackGrowsUp target. Change to subtract the absolute value of the LocalAreaOffset. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82693 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-23Edit a comment.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82641 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-18Fix a comment typo and some whitespace.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82285 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-22Record variable debug info at ISel time directly.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79742 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-15Don't setCalleeSavedInfoValid() until spills are interted.Jakob Stoklund Olesen
In a naked function, the flag is never set and getPristineRegs() returns an empty list. That means naked functions are able to clobber callee saved registers, but that is the whole point of naked functions. This fixes PR4716. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79096 91177308-0d34-0410-b5e6-96231b3b80d8
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