llvm - http://llvm.org

Age	Commit message (Collapse)	Author
2009-05-17	Rename MachineVerifier pass to avoid command line collision.	Jakob Stoklund Olesen
	git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71987 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-16	Verify that explicit definitions in the TargetInstrDesc are matched by	Jakob Stoklund Olesen
	explicit register define operands. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71933 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-16	Allow redefinition of reserved registers.	Jakob Stoklund Olesen
	git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71932 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-16	Pacify gcc-4.3, which suggests explicit braces here	Duncan Sands
	to avoid an ambiguous else. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71924 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-16	Pass to verify generated machine code.	Jakob Stoklund Olesen
	The following is checked: * Operand counts: All explicit operands must be present. * Register classes: All physical and virtual register operands must be compatible with the register class required by the instruction descriptor. * Register live intervals: Registers must be defined only once, and must be defined before use. The machine code verifier is enabled with the command-line option '-verify-machineinstrs', or by defining the environment variable LLVM_VERIFY_MACHINEINSTRS to the name of a file that will receive all the verifier errors. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71918 91177308-0d34-0410-b5e6-96231b3b80d8