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path: root/lib/CodeGen/MachineInstr.cpp
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2011-01-09Replace TargetRegisterInfo::printReg with a PrintReg class that also works ↵Jakob Stoklund Olesen
without a TRI instance. Print virtual registers numbered from 0 instead of the arbitrary FirstVirtualRegister. The first virtual register is printed as %vreg0. TRI::NoRegister is printed as %noreg. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123107 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-07Do not model all INLINEASM instructions as having unmodelled side effects.Evan Cheng
Instead encode llvm IR level property "HasSideEffects" in an operand (shared with IsAlignStack). Added MachineInstrs::hasUnmodeledSideEffects() to check the operand when the instruction is an INLINEASM. This allows memory instructions to be moved around INLINEASM instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123044 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-07DBG_VALUE does not have any side effects; it also makes no sense to mark it ↵Evan Cheng
cheap as a copy. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123031 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22Unbreak build.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117155 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-20Make CodeGen TBAA-aware.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116890 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-19Shrink MachineOperand from 40 to 32 bytes on 64-bit hosts.Jakob Stoklund Olesen
Pull an unsigned out of the Contents union such that it has the same size as two pointers and no padding. Arrange members such that the Contents union and all pointers can be 8-byte aligned without padding. This speeds up code generation by 0.8% on a 64-bit host. 32-bit hosts should be unaffected. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116857 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-21convert a couple more places to use the new getStore()Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114463 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-21add some accessorsChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114409 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-21it's more elegant to put the "getConstantPool" andChris Lattner
"getFixedStack" on the MachinePointerInfo class. While this isn't the problem I'm setting out to solve, it is the right way to eliminate PseudoSourceValue, so lets go with it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114406 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-21add some helpful accessors.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114400 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-21start pushing MachinePointerInfo out through the MachineMemOperand interfaceChris Lattner
to the MachineFunction construction methods. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114390 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-21refactor the Value*/offset pair from MachineMemOperand out to a newChris Lattner
MachinePointerInfo struct, no functionality change. This also adds an assert to MachineMemOperand::MachineMemOperand that verifies that the Value* is either null or is an IR pointer type. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114389 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-02Prefix `next' iterator operation with `llvm::'.Oscar Fuentes
Fixes potential ambiguity problems on VS 2010. Patch by nobled! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110029 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-28Print out the regclass of any virtual registers used by a machine instruction.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109608 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-04Print symbolic subreg indices on REG_SEQUENCE and INSERT_SUBREG.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107602 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-02Propagate the AlignStack bit in InlineAsm's to the Dale Johannesen
PrologEpilog code, and use it to determine whether the asm forces stack alignment or not. gcc consistently does not do this for GCC-style asms; Apple gcc inconsistently sometimes does it for asm blocks. There is no convenient place to put a bit in either the SDNode or the MachineInstr form, so I've added an extra operand to each; unlovely, but it does allow for expansion for more bits, should we need it. PR 5125. Some existing testcases are affected. The operand lists of the SDNode and MachineInstr forms are indexed with awesome mnemonics, like "2"; I may fix this someday, but not now. I'm not making it any worse. If anyone is inspired I think you can find all the right places from this patch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107506 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-29Print InlinedAt location.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107208 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-18Teach regular and fast isel to set dead flags on unused implicit defsDan Gohman
on calls and similar instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106353 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-02Slightly change the meaning of the reMaterialize target hook when the originalJakob Stoklund Olesen
instruction defines subregisters. Any existing subreg indices on the original instruction are preserved or composed with the new subreg index. Also substitute multiple operands mentioning the original register by using the new MachineInstr::substituteRegister() function. This is necessary because there will soon be <imp-def> operands added to non read-modify-write partial definitions. This instruction: %reg1234:foo = FLAP %reg1234<imp-def> will reMaterialize(%reg3333, bar) like this: %reg3333:bar-foo = FLAP %reg333:bar<imp-def> Finally, replace the TargetRegisterInfo pointer argument with a reference to indicate that it cannot be NULL. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105358 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-01Properly compose subregister indices when coalescing.Jakob Stoklund Olesen
The comment about ordering of subreg indices is no longer true. This exposed a bug in the new substVirtReg method that is also fixed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105294 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-28Add a TargetRegisterInfo::composeSubRegIndices hook with a defaultJakob Stoklund Olesen
implementation that is correct for most targets. Tablegen will override where needed. Add MachineOperand::subst{Virt,Phys}Reg methods that correctly handle existing subreg indices when sustituting registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104985 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-25Print symbolic SubRegIndex names on machine operands.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104628 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-21- Change MachineInstr::findRegisterDefOperandIdx so it can also look for defsEvan Cheng
that are aliases of the specified register. - Rename modifiesRegister to definesRegister since it's looking a def of the specific register or one of its super-registers. It's not looking for def of a sub-register or alias that could change the specified register. - Added modifiesRegister to look for defs of aliases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104377 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-21Add MachineInstr::readsWritesVirtualRegister() to determine if an instructionJakob Stoklund Olesen
reads or writes a register. This takes partial redefines and undef uses into account. Don't actually use it yet. That caused miscompiles. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104372 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-21Revert "Use MachineInstr::readsWritesVirtualRegister to determine if a ↵Jakob Stoklund Olesen
register is read." This reverts r104322. I think it was causing miscompilations. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104323 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-21Use MachineInstr::readsWritesVirtualRegister to determine if a register is read.Jakob Stoklund Olesen
This correctly handles partial redefines and undef uses. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104322 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-21If the first definition of a virtual register is a partial redef, add anJakob Stoklund Olesen
<imp-def> operand for the full register. This ensures that the full physical register is marked live after register allocation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104320 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-19Add MachineInstr::readsVirtualRegister() in preparation for proper handling ofJakob Stoklund Olesen
partial redefines. We are going to treat a partial redefine of a virtual register as a read-modify-write: %reg1024:6 = OP Unless the register is fully clobbered: %reg1024:6 = OP, %reg1024<imp-def> MachineInstr::readsVirtualRegister() knows the difference. The first case is a read, the second isn't. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104149 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-13Teach MachineLICM and MachineSink how to clear kill flags conservativelyDan Gohman
when they move instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103737 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-28Pretty print DBG_VALUE machine instructions.Evan Cheng
Before: DBG_VALUE %RSI, 0, !-1; dbg:SimpleRegisterCoalescing.cpp:2707 Now: DBG_VALUE %RSI, 0, !"this"; dbg:SimpleRegisterCoalescing.cpp:2707 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102518 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-09Use getNumImplicitDefs() and getNumImplicitUses().Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100850 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-09Fix up some comments.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100849 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-08Coalescer should not delete copy instructions whose defs are partially dead. ↵Evan Cheng
e.g. %RDI<def,dead> = MOV64rr %RAX<kill>, %EDI<imp-def> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100804 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-07fix a latent bug my inline asm stuff exposed: Chris Lattner
MachineOperand::isIdenticalTo wasn't handling metadata operands. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100636 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-02stop using DebugLoc::getUnknownLoc()Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100215 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-02Switch the code generator (except the JIT) onto the new DebugLocChris Lattner
representation. This eliminates the 'DILocation' MDNodes for file/line/col tuples from -O0 -g codegen. This remove the old DebugLoc class, making it a typedef for DebugLoc, I'll rename NewDebugLoc next. I didn't update the JIT to use the new apis, so it will continue to work, but be as slow as before. Someone should eventually do this or, better yet, rip out the JIT debug info stuff and build the JIT on top of MC. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100209 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-13add support for MCSymbols as operands to MachineInstrs.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98433 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-08Avoid using DIDescriptor.isNull(). Devang Patel
This is a first step towards eliminating checks in Descriptor constructors. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97975 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-08Revert r97947.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97963 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-08Avoid using DIDescriptor.isNull().Devang Patel
This is a first step towards eliminating unncessary constructor checks in light weight DIDescriptor wrappers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97947 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-03Move MachineInstrExpressionTrait::getHashValue() out of line so it can skip ↵Evan Cheng
over only virtual register defs. This matches what isEqual() is doing. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97680 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-03Fix funky indentation and add comments.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97670 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-03- Change MachineInstr::isIdenticalTo to take a new option that determines ↵Evan Cheng
whether it should skip checking defs or at least virtual register defs. This subsumes part of the TargetInstrInfo::isIdentical functionality. - Eliminate TargetInstrInfo::isIdentical and replace it with produceSameValue. In the default case, produceSameValue just checks whether two machine instructions are identical (except for virtual register defs). But targets may override it to check for unusual cases (e.g. ARM pic loads from constant pools). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97628 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-02Swap parameters of isSafeToMove and isSafeToReMat for consistency.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97578 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-15Add non-temporal flags to MachineMemOperand.David Greene
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96226 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-10Fix "the the" and similar typos.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95781 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-10Add isDebug argument to ChangeToRegister; this preventsDale Johannesen
the field from being used uninitialized later in some cases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95735 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-09move target-independent opcodes out of TargetInstrInfoChris Lattner
into TargetOpcodes.h. #include the new TargetOpcodes.h into MachineInstr. Add new inline accessors (like isPHI()) to MachineInstr, and start using them throughout the codebase. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95687 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-19Identify predicate and optional-def operands when printing machineJakob Stoklund Olesen
instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93925 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-16Replace DebugLocTuple with DILocation.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93630 91177308-0d34-0410-b5e6-96231b3b80d8
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