aboutsummaryrefslogtreecommitdiff
AgeCommit message (Collapse)Author
2013-04-12[ms-inline asm] Move this logic into a static function as it's only applicableChad Rosier
when parsing MS-style inline assembly. No functional change intended. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179407 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12[ms-inline asm] Address the FIXME for ImmDisp before brackets. ThisChad Rosier
is a follow on to r179393 and r179399. Test case to be added on the clang side. Part of rdar://13453209 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179403 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12lit: Fix infinite recursion when an out-of-tree test root is located inside ↵Daniel Dunbar
the source test root. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179402 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12lit: Add a test for discovery w/ test_exec_root (out-of-tree test root).Daniel Dunbar
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179401 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12[ms-inline asm] Have the [ Symbol ] case fall into the more general logic. ThisChad Rosier
is a follow on to r179393. Test case to be added on the clang side. Part of rdar://13453209 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179399 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12ARM: Correct printing of pre-indexed operands.Quentin Colombet
According to the ARM reference manual, constant offsets are mandatory for pre-indexed addressing modes. The MC disassembler was not obeying this when the offset is 0. It was producing instructions like: str r0, [r1]!. Correct syntax is: str r0, [r1, #0]!. This change modifies the dumping of operands so that the offset is always printed, regardless of its value, when pre-indexed addressing mode is used. Patch by Mihail Popa <Mihail.Popa@arm.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179398 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12[ms-inline asm] Add support for operands that include both a symbol and anChad Rosier
immediate displacement. Specifically, add support for generating the proper IR. We've been able to parse this for some time now. Test case to be added on the clang side. Part of rdar://13453209 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179393 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12PPC: Remove (broken) nested implicit definition listsHal Finkel
TableGen will not combine nested list 'let' bindings into a single list, and instead uses only the inner scope. As a result, several instruction definitions were missing implicit register defs that were in outer scopes. This de-nests these scopes and makes all instructions have only one let binding which sets implicit register definitions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179392 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12Add a comment about the PPC Interpretation64Bit bitHal Finkel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179391 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12Hexagon: Set isPredicatedNew flag on predicate new instructions.Jyotsna Verma
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179388 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12Hexagon: Set isPredicatedFlase flag for all the instructions with negated ↵Jyotsna Verma
predication. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179387 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12Simplify (A & ~B) in icmp if A is a power of 2David Majnemer
The transform will execute like so: (A & ~B) == 0 --> (A & B) != 0 (A & ~B) != 0 --> (A & B) == 0 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179386 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12[ms-inline asm] Add the implementation for the AOK_Delete kind, which was addedChad Rosier
in r179325. Test case coming shortly on the clang side. Part of rdar://13453209 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179383 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12LoopVectorizer: integer division is not a reduction operationArnold Schwaighofer
Don't classify idiv/udiv as a reduction operation. Integer division is lossy. For example : (1 / 2) * 4 != 4/2. Example: int a[] = { 2, 5, 2, 2} int x = 80; for() x /= a[i]; Scalar: x /= 2 // = 40 x /= 5 // = 8 x /= 2 // = 4 x /= 2 // = 2 Vectorized: <80, 1> / <2,5> //= <40,0> <40, 0> / <2,2> //= <20,0> 20*0 = 0 radar://13640654 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179381 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12AArch64: use full triple for ELF testsTim Northover
These tests rely specifically on the names of ELF relocations, let alone any other detail. There's no way they'd work if LLVM was emitting something else by default. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179376 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12AArch64: remove over-zealous use of CHECK-NEXTTim Northover
It turns out some platforms (e.g. Windows) lay out their llvm-mc slightly differently with extra newlines; there was no real reason for the test lines to be consecutive, so this relaxes the FileCheck. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179375 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12Revert broken pieces of r179373.Benjamin Kramer
You can't copy an OwningPtr, and move semantics aren't available in C++98. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179374 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12Replace uses of the deprecated std::auto_ptr with OwningPtr.Andy Gibbs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179373 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12Fix a disconcerting bug in Value::isUsedInBasicBlock, which gave wrong ↵Benjamin Kramer
answers for blocks larger than 3 instrs. Also add a unit test. PR15727. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179370 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12Don't explicitly provide -pie in MSan bootstrap of LLVM, as it's now implied ↵Alexey Samsonov
by the driver git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179367 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12Teach llvm-readobj to print ELF program headersNico Rieck
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179363 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12Remove obsolete object file dumpersNico Rieck
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179362 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12Replace coff-/elf-dump with llvm-readobjNico Rieck
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179361 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12Add extensive relocation tests for llvm-readobjNico Rieck
This test ensures that relocation type names returned by libObject match the raw relocation type value. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179360 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12Add -expand-relocs to llvm-readobjNico Rieck
This option expands shown relocations from single line to a dictionary format: Relocation { Offset: 0x4 Type: R_386_32 (1) Symbol: sym Info: 0x0 } git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179359 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12Add missing relocation namesNico Rieck
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179358 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12Support MIPS64EL relocation type namesNico Rieck
MIPS64EL relocation entries have up to three relocation operations. Because libObject only exposes a single relocation name, use the concatenation of the individual relocation type names. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179357 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12Add PPC instruction record forms and associated query functionsHal Finkel
This is prep. work for the implementation of optimizeCompare. Many PPC instructions have 'record' forms (in almost all cases, this means that the RC bit is set) that cause the result of the instruction to be compared with zero, and the result of that comparison saved in a predefined condition register. In order to add the record forms of the instructions without too much copy-and-paste, the relevant functions have been refactored into multiclasses which define both the record and normal forms. Also, two TableGen-generated mapping functions have been added which allow querying the instruction code for the record form given the normal form (and vice versa). No functionality change intended. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179356 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12Don't disable block layout when forcing block alignment.Nadav Rotem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179355 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12Fix the test on linux by setting the triple and the align formatNadav Rotem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179354 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12Add a flag to align all basic blocks in the function.Nadav Rotem
When debugging performance regressions we often ask ourselves if the regression that we see is due to poor isel/sched/ra or due to some micro-architetural problem. When comparing two code sequences one good way to rule out front-end bottlenecks (and other the issues) is to force code alignment. This pass adds a flag that forces the alignment of all of the basic blocks in the program. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179353 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12Add 179294 back, but don't use bit fields so that it works on big endian hosts.Rafael Espindola
Original message: Print more information about relocations. With this patch llvm-readobj now prints if a relocation is pcrel, its length, if it is extern and if it is scattered. It also refactors the code a bit to use bit fields instead of shifts and masks all over the place. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179345 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-11[ms-inline asm] Add support for using the LENGTH, TYPE, and SIZE operators withChad Rosier
variables that use namespace alias qualifiers. Test case coming on clang side shortly. Part of rdar://13499009 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179343 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-11[ms-inline asm] Add support for using offsetof operator with variables that useChad Rosier
namespace alias qualifiers. Test case coming on clang side shortly. Part of rdar://13499009 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179339 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-11Aliasing rules for struct-path aware TBAA.Manman Ren
Added PathAliases to check if two struct-path tags can alias. Added command line option -struct-path-tbaa. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179337 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-11[ms-inline asm] Pass a StringRef reference to ParseIntelVarWithQualifier so weChad Rosier
can build up the identifier string. No test case as support for looking up these type of identifiers hasn't been implemented on the clang side. Part of rdar://13499009 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179336 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-11TBAA: add utility to create a TBAA scalar type nodeManman Ren
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179331 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-11[ms-inline asm] Add a new AsmRewriteKind, AOK_Delete. To be used in a futureChad Rosier
commit. Part of rdar://13453209 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179325 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-11[ms-inline asm] Remove brackets from around a symbol reference in the targetChad Rosier
specific logic. This makes the code much less fragile. Test case coming on the clang side in a moment. rdar://13634327 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179323 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-11Use FileCheck instead of grep.Preston Gurd
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179322 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-11Fix undefined behavior in AArch64David Majnemer
A64Imms::isLogicalImmBits and A64Imms::isLogicalImm will attempt to execute shifts that perform undefined behavior. Instead of attempting to perform the 64-bit rotation, treat it as a no-op. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179317 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-11Optimize icmp involving addition betterDavid Majnemer
Allows LLVM to optimize sequences like the following: %add = add nsw i32 %x, 1 %cmp = icmp sgt i32 %add, %y into: %cmp = icmp sge i32 %x, %y as well as: %add1 = add nsw i32 %x, 20 %add2 = add nsw i32 %y, 57 %cmp = icmp sge i32 %add1, %add2 into: %add = add nsw i32 %y, 37 %cmp = icmp sle i32 %cmp, %x git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179316 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-11Mips specific inline asm memory operand modifier test caseJack Carter
These changes are based on commit responses for r179135. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179315 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-11[mips] Custom-lower i64 MULHS and MULHU nodes. Remove the code which selectsAkira Hatanaka
multiply instructions in MipsSEDAGToDAGISel. This patch was supposed to be part of r178403. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179314 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-11[mips] Clean up MipsISelDAGToDAG.cpp and MipsISelLowering.cpp.Akira Hatanaka
- Rename function. - Pass iterator by value. - Remove header include. No functionality changes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179312 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-11Revert my last two commits while I debug what is wrong in a big endian host.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179303 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-11Fix llvm-readobj tests on big endian hosts.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179298 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-11Print more information about relocations.Rafael Espindola
With this patch llvm-readobj now prints if a relocation is pcrel, its length, if it is extern and if it is scattered. It also refactors the code a bit to use bit fields instead of shifts and masks all over the place. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179294 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-11Fix for wrong instcombine on vector insert/extractBenjamin Kramer
When trying to collapse sequences of insertelement/extractelement instructions into single shuffle instructions, there is one specific case where the Instruction Combiner wrongly updates the resulting Mask of shuffle indexes. The problem is in function CollectShuffleElments. If we have a sequence of insert/extract element instructions like the one below: %tmp1 = extractelement <4 x float> %LHS, i32 0 %tmp2 = insertelement <4 x float> %RHS, float %tmp1, i32 1 %tmp3 = extractelement <4 x float> %RHS, i32 2 %tmp4 = insertelement <4 x float> %tmp2, float %tmp3, i32 3 Where: . %RHS will have a mask of [4,5,6,7] . %LHS will have a mask of [0,1,2,3] The Mask of shuffle indexes is wrongly computed to [4,1,6,7] instead of [4,0,6,7]. When analyzing %tmp2 in order to compute the Mask for the resulting shuffle instruction, the algorithm forgets to update the mask index at position 1 with the index associated to the element extracted from %LHS by instruction %tmp1. Patch by Andrea DiBiagio! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179291 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-11Add a CHECK-NOT for a more faithful translation of the original grep | count 2.Eli Bendersky
Thanks to Reid Kleckner for catching this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179289 91177308-0d34-0410-b5e6-96231b3b80d8
generated by cgit v1.2.3-18-g5258 (git 2.32.0) at 2025-06-30 12:53:24 +0000