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2008-03-10Avoid creating BUILD_VECTOR of all zero elements of "non-normalized" type ↵Evan Cheng
(e.g. v8i16 on x86) after legalizer. Instruction selection does not expect to see them. In all likelihood this can only be an issue in a bugpoint reduced test case. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48136 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10remove an execution test.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48135 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10switch from hard coded g++/as tools to the ones detected fromChris Lattner
the build system. Patch by Joachim Durchholz for PR2121 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48134 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10Fix a typoChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48133 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10Fix PR2120 by changing the replacement order to change compile_cxx Chris Lattner
before compile_c. Patch by Joachim Durchholz! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48132 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10Allow insert_subreg into implicit, target-specific values. Christopher Lamb
Change insert/extract subreg instructions to be able to be used in TableGen patterns. Use the above features to reimplement an x86-64 pseudo instruction as a pattern. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48130 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10Update the .cvs files to match today's asm syntax change.Nick Lewycky
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48128 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10Revert accidentally committed local changes.Christopher Lamb
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48126 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10Add support in TableGen for unknown operands that infer their type from the ↵Christopher Lamb
pattern their used in. This will be used to allow insert/extract subreg patterns in .td files! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48125 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10Turn unwind_to into "unwinds to".Nick Lewycky
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48123 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10Increase ISD::ParamFlags to 64 bits. Increase the ByValSizeDale Johannesen
field to 32 bits, thus enabling correct handling of ByVal structs bigger than 0x1ffff. Abstract interface a bit. Fixes gcc.c-torture/execute/pr23135.c and gcc.c-torture/execute/pr28982b.c in gcc testsuite (were ICE'ing on ppc32, quietly producing wrong code on x86-32.) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48122 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-09This works on x86_64Anton Korobeynikov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48121 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-09Darwin PPC64 indirect call target goes in X12, not R12. This fixes theseChris Lattner
two regression tests: test/CodeGen/PowerPC/2007-10-21-LocalRegAllocAssert.ll test/CodeGen/PowerPC/2007-10-21-LocalRegAllocAssert2.ll git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48120 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-09cell really does support cross-regclass moves, because R3 is in lots of ↵Chris Lattner
different regclasses, and the code is not consistent when it comes to value tracking. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48119 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-09make sure ar.pfs is in a register class, this fixes test/CodeGen/IA64/ret-0.llChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48118 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-09remove an extraneous (and ugly) default argument, thanks Duncan.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48117 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-09Fix RUN line.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48116 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-09Fix some compilation errors on msvc:Ted Kremenek
- "Redefinition of I" (iterator masks previous definition) - include missing header file Patch by Argiris Kirtzidis! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48115 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-09And again.Nick Lewycky
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48112 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-09Braces belong here. No functionality change.Nick Lewycky
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48111 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-09Temporary XFAIL the test, until I'll commit a fixAnton Korobeynikov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48110 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-09SCCP also needs to be taught to follow unwind_toNick Lewycky
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48109 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-09fp_round's produced by getCopyFromParts should always be exact, becauseChris Lattner
they are produced by calls (which are known exact) and by cross block copies which are known to be produced by extends. This improves: define double @test2() { %tmp85 = call double asm sideeffect "fld0", "={st(0)}"() ret double %tmp85 } from: _test2: subl $20, %esp # InlineAsm Start fld0 # InlineAsm End fstpl 8(%esp) movsd 8(%esp), %xmm0 movsd %xmm0, (%esp) fldl (%esp) addl $20, %esp #FP_REG_KILL ret to: _test2: # InlineAsm Start fld0 # InlineAsm End #FP_REG_KILL ret by avoiding a f64 <-> f80 trip git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48108 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-09teach X86InstrInfo::copyRegToReg how to copy into ST(0) from Chris Lattner
an RFP register class. Teach ScheduleDAG how to handle CopyToReg with different src/dst reg classes. This allows us to compile trivial inline asms that expect stuff on the top of x87-fp stack. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48107 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-09Don't eliminate blocks that are only reachable by unwind_to.Nick Lewycky
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48106 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-09Add ScheduleDAG support for copytoreg where the src/dst register areChris Lattner
in different register classes, e.g. copy of ST(0) to RFP*. This gets some really trivial inline asm working that plops things on the top of stack (PR879) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48105 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-09add some code to support cross-register class copying from Chris Lattner
RST -> RFP{32/64/80}. We only handle ST(0) for now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48104 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-09Remove llvm-upgrade and update tests.Tanya Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48103 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-09rearrange some code, no functionality change.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48101 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-09fix 80 col violationChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48100 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-09Firstly, having a BranchInst isn't exclusive with having an unwind_to.Nick Lewycky
Secondly, we have to check whether the branch is actually pointing to the block with the unwind in it. We could have gotten here because of the unwind_to alone. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48099 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-09claim ST(x) registers are 80 bits, which is true. This doesn't affect Chris Lattner
codegen yet because these can't be spilled (they don't exist until after RA). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48098 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-09extend fp values with FP_EXTEND not FP_ROUND.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48097 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-09A BB that unwind_to an "unwind" inst is that same as one that doesn't unwind_toNick Lewycky
at all. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48096 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-09This patch cleans up the OCaml bindings so that they format nicely withGordon Henriksen
ocamldoc. It does not yet hook into the build system, though. Patch by Erick Tryzelaar! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48095 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-09rename FP_SETRESULT -> FP_SET_ST0Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48094 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-09rename FpGETRESULT32 -> FpGET_ST0_32 etc. Add support forChris Lattner
isel'ing value preserving FP roundings from one fp stack reg to another into a noop, instead of stack traffic. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48093 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-09reduce this testcase moreChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48092 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-09Finish implementing a readme entry: when inserting an i64 variableChris Lattner
into a vector of zeros or undef, and when the top part is obviously zero, we can just use movd + shuffle. This allows us to compile vec_set-B.ll into: _test3: movl $1234567, %eax andl 4(%esp), %eax movd %eax, %xmm0 ret instead of: _test3: subl $28, %esp movl $1234567, %eax andl 32(%esp), %eax movl %eax, (%esp) movl $0, 4(%esp) movq (%esp), %xmm0 addl $28, %esp ret git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48090 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-09Update the block cloner which fixes bugpoint on code using unwind_to (phew!)Nick Lewycky
and also update the cloning interface's major user, the loop optimizations. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48088 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-09Update the inliner and simplifycfg to handle unwind_to.Nick Lewycky
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48086 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-09Two things. Preserve the unwind_to when splitting a BB.Nick Lewycky
Add the ability to remove just one instance of a BB from a phi node. This fixes the compile error in the tree now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48085 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-09Prune the unwind_to labels on BBs that don't need them. Another step in theNick Lewycky
removal of invoke, PR1269. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48084 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-09add a noteChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48064 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-09Implement a readme entry, compilingChris Lattner
#include <xmmintrin.h> __m128i doload64(short x) {return _mm_set_epi16(0,0,0,0,0,0,0,1);} into: movl $1, %eax movd %eax, %xmm0 ret instead of a constant pool load. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48063 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-09upgrade this testChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48062 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-09make this test harderChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48061 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-09Fix two problems in SelectionDAGLegalize::ExpandBUILD_VECTOR's handlingChris Lattner
of BUILD_VECTORS that only have two unique elements: 1. The previous code was nondeterminstic, because it walked a map in SDOperand order, which isn't determinstic. 2. The previous code didn't handle the case when one element was undef very well. Now we ensure that the generated shuffle mask has the undef vector on the RHS (instead of potentially being on the LHS) and that any elements that refer to it are themselves undef. This allows us to compile CodeGen/X86/vec_set-9.ll into: _test3: movd %rdi, %xmm0 punpcklqdq %xmm0, %xmm0 ret instead of: _test3: movd %rdi, %xmm1 #IMPLICIT_DEF %xmm0 punpcklqdq %xmm1, %xmm0 ret ... saving a register. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48060 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-08Teach SD some vector identities, allowing us to compile vec_set-9 into:Chris Lattner
_test3: movd %rdi, %xmm1 #IMPLICIT_DEF %xmm0 punpcklqdq %xmm1, %xmm0 ret instead of: _test3: #IMPLICIT_DEF %rax movd %rax, %xmm0 movd %rdi, %xmm1 punpcklqdq %xmm1, %xmm0 ret This is still not ideal. There is no reason to two xmm regs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48058 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-081) Improve comments.Chris Lattner
2) Don't try to insert an i64 value into the low part of a vector with movq on an x86-32 target. This allows us to compile: __m128i doload64(short x) {return _mm_set_epi16(0,0,0,0,0,0,0,1);} into: _doload64: movaps LCPI1_0, %xmm0 ret instead of: _doload64: subl $28, %esp movl $0, 4(%esp) movl $1, (%esp) movq (%esp), %xmm0 addl $28, %esp ret git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48057 91177308-0d34-0410-b5e6-96231b3b80d8
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