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rearrange some of the accessors to be more efficient.
This makes it much more efficient to iterate over all of the things with the
same value. This speeds up liveintervals analysis from 8.63s to 3.79s with
a release build of llc on kc++ with -march=ia64. This also speeds up live
var from 1.66s -> 0.87s as well, reducing total llc time from 20.1s->15.2s.
This also speeds up other targets slightly, e.g. llc time on X86 from 16.84
-> 16.45s, and PPC from 17.64->17.03s.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22990 91177308-0d34-0410-b5e6-96231b3b80d8
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Use this information to avoid doing expensive interval intersections for
registers that could not possible be interesting. This speeds up linscan
on ia64 compiling kc++ in release mode from taking 7.82s to 4.8s(!), total
itanium llc time on this program is 27.3s now. This marginally speeds up
PPC and X86, but they appear to be limited by other parts of linscan, not
this code.
On this program, on itanium, live intervals now takes 41% of llc time.
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x%y for 'rem' on fp values.
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either seteq X, 0 or srl (ctlz X), size(X-1), depending on what's legal
for the target.
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LowercaseString
in the asmprinter. This changes the .td files to use lower case register names,
avoiding the need to do this call. This speeds up the asmprinter from 1.52s
to 1.06s on kc++ in a release build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22974 91177308-0d34-0410-b5e6-96231b3b80d8
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It used to crash on any function that took float arguments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22973 91177308-0d34-0410-b5e6-96231b3b80d8
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number of regs (e.g. most riscs), many functions won't need to use callee
clobbered registers. Do a speculative check to see if we can get a free
register without processing the fixed list (which has all of these). This
saves a lot of time on machines with lots of callee clobbered regs (e.g.
ppc and itanium, also x86).
This reduces ppc llc compile time from 184s -> 172s on kc++. This is probably
worth FAR FAR more on itanium though.
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we spill out of the fast path. The scan of active_ and the calls to
updateSpillWeights don't need to happen unless a spill occurs. This reduces
debug llc time of kc++ with ppc from 187.3s to 183.2s.
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promoted to the right type. This fixes: IA64/2005-08-22-LegalizerCrash.ll
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add some comments. This loop really needs to be reevaluated!
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allowing us to compile this:
float %test2(float* %P) {
%Q = load float* %P
%R = add float %Q, 10.1
ret float %R
}
to this:
_test2:
lfs r2, 0(r3)
lis r3, ha16(.CPI_test2_0)
lfs r3, lo16(.CPI_test2_0)(r3)
fadds f1, r2, r3
blr
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float %test2(float* %P) {
%Q = load float* %P
%R = add float %Q, %Q
ret float %R
}
By returning the right result.
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that is conditionally executed
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simplifies BRTWOWAY into BR if one of the results is a fall-through.
Unless I'm missing something, there is no reason to duplicate this
in the target-specific code.
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the old condition to a one bit value. The incoming value must have been
promoted, and the top bits are undefined. This causes us to generate:
_test:
rlwinm r2, r3, 0, 31, 31
li r3, 17
cmpwi cr0, r2, 0
bne .LBB_test_2 ;
.LBB_test_1: ;
li r3, 1
.LBB_test_2: ;
blr
instead of:
_test:
rlwinm r2, r3, 0, 31, 31
li r2, 17
cmpwi cr0, r3, 0
bne .LBB_test_2 ;
.LBB_test_1: ;
li r2, 1
.LBB_test_2: ;
or r3, r2, r2
blr
for:
int %test(bool %c) {
%retval = select bool %c, int 17, int 1
ret int %retval
}
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it in the block. This codegens:
int %test(bool %c) {
%retval = select bool %c, int 17, int 1
ret int %retval
}
as:
_test:
rlwinm r2, r3, 0, 31, 31
li r2, 17
cmpwi cr0, r3, 0
bne .LBB_test_2 ;
.LBB_test_1: ;
li r2, 1
.LBB_test_2: ;
or r3, r2, r2
blr
instead of:
_test:
rlwinm r2, r3, 0, 31, 31
li r2, 17
li r4, 1
cmpwi cr0, r3, 0
bne .LBB_test_2 ;
.LBB_test_1: ;
or r2, r4, r4
.LBB_test_2: ;
or r3, r2, r2
blr
... which is one fewer instruction. The savings are more significant for
global address and constantfp nodes.
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This REALLY should be lowered by the legalizer!
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