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2011-07-26The compact unwinding offsets are divided by 8 on 64-bit machines.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136065 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26Describe the reasoning for compact unwind in better terms. Thanks to Nick ↵Bill Wendling
Kledzik for the description. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136064 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26Add 256-bit isel for movsldup/movshdupBruno Cardoso Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136051 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26More movsldup/movshdup cleanup. Rewrite the mask matching function and addBruno Cardoso Lopes
support for 256-bit versions (but no instruction selection yet, coming next). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136050 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26More cleanup, subtarget info isn't used here.Bruno Cardoso Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136049 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26Add 128-bit AVX versions of movshdup/mosldupBruno Cardoso Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136048 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26Cleanup movsldup/movshdup matching.Bruno Cardoso Lopes
27 insertions(+), 62 deletions(-) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136047 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26Revert to RA_Assign when a virtreg separates into components.Jakob Stoklund Olesen
When dead code elimination deletes a PHI value, the virtual register may split into multiple connected components. In that case, revert each component to the RS_Assign stage. The new components are guaranteed to be smaller (the original value numbers are distributed among the components), so this will always be making progress. The components are now allowed to evict other live ranges or be split again. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136034 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26Rename createCodeEmitter to createMCCodeEmitter; createObjectStreamer to ↵Evan Cheng
createMCObjectStreamer. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136031 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26Remove a file from CMakeLists.txt that Evan removed in r136027.Chandler Carruth
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136030 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26Rename TargetAsmParser to MCTargetAsmParser and TargetAsmLexer to ↵Evan Cheng
MCTargetAsmLexer; rename createAsmLexer to createMCAsmLexer and createAsmParser to createMCAsmParser. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136027 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26Still more library dependency updates. This reflects the ever decreasingChandler Carruth
dependence on CodeGen layers and backends from the MC layers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136024 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26Clean up a pile of hacks in our CMake build relating to TableGen.Chandler Carruth
The first problem to fix is to stop creating synthetic *Table_gen targets next to all of the LLVM libraries. These had no real effect as CMake specifies that add_custom_command(OUTPUT ...) directives (what the 'tablegen(...)' stuff expands to) are implicitly added as dependencies to all the rules in that CMakeLists.txt. These synthetic rules started to cause problems as we started more and more heavily using tablegen files from *subdirectories* of the one where they were generated. Within those directories, the set of tablegen outputs was still available and so these synthetic rules added them as dependencies of those subdirectories. However, they were no longer properly associated with the custom command to generate them. Most of the time this "just worked" because something would get to the parent directory first, and run tablegen there. Once run, the files existed and the build proceeded happily. However, as more and more subdirectories have started using this, the probability of this failing to happen has increased. Recently with the MC refactorings, it became quite common for me when touching a large enough number of targets. To add insult to injury, several of the backends *tried* to fix this by adding explicit dependencies back to the parent directory's tablegen rules, but those dependencies didn't work as expected -- they weren't forming a linear chain, they were adding another thread in the race. This patch removes these synthetic rules completely, and adds a much simpler function to declare explicitly that a collection of tablegen'ed files are referenced by other libraries. From that, we can add explicit dependencies from the smaller libraries (such as every architectures Desc library) on this and correctly form a linear sequence. All of the backends are updated to use it, sometimes replacing the existing attempt at adding a dependency, sometimes adding a previously missing dependency edge. Please let me know if this causes any problems, but it fixes a rather persistent and problematic source of build flakiness on our end. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136023 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25ARM assembly parsing and encoding for SSAX, SSUB16 and SSUB8.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136013 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25TargetAsmBackend has been renamed to MCAsmBackend.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136012 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25Rename TargetAsmBackend to MCAsmBackend; rename createAsmBackend to ↵Evan Cheng
createMCAsmBackend. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136010 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25Initial implementation of 'fence' instruction, the new C++0x-style ↵Eli Friedman
replacement for llvm.memory.barrier. This is just a LangRef entry and reading/writing/memory representation; optimizer+codegen support coming soon. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136009 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25Finish adding support for lifetime intrinsics to SROA. Fixes PR10121!Nick Lewycky
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136008 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25I will save before I commit.Benjamin Kramer
I will save before I commit. I will save before I commit. I will save before I commit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136007 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25ARM assembly parsing and encoding for SSAT16 instruction.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136006 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25Codegen allonesvector better while using AVX: vpcmpeqd + vinsertf128Bruno Cardoso Lopes
This also fixes PR10452 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136004 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25Add remaining 256-bit vector bitcasts. This also fixes PR10451Bruno Cardoso Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136003 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25- Handle special scalar_to_vector case: splats. Using a native 128-bitBruno Cardoso Lopes
shuffle before inserting on a 256-bit vector. - Add AVX versions of movd/movq instructions - Introduce a few COPY patterns to match insert_subvector instructions. This turns a trivial insert_subvector instruction into a register copy, coalescing the xmm into a ymm and avoid emiting on more instruction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136002 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25Reintroduce r135730, this is indeed the right approach, there is noBruno Cardoso Lopes
native 256-bit vector instruction to do scalar_to_vector. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136001 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25llvm-objdump: Ignore unreachable blocks when printing the CFG.Benjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136000 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25Fix include guards.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135998 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25Add a note about efficient codegen for binary log.Benjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135996 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25Attempt to fix test failure reported on llvm-commits.Eli Friedman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135995 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25BranchProbability::print returns void now.Jakub Staszak
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135994 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25Make sure this DAGCombine actually returns an UNDEF of the correct type; ↵Eli Friedman
PR10476. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135993 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25Add BlockFrequency class.Jakub Staszak
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135992 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25ARM assembly parsing and encoding for SSAT instruction.Jim Grosbach
Fix the Rn register encoding for both SSAT and USAT. Update the parsing of the shift operand to correctly handle the allowed shift types and immediate ranges and issue meaningful diagnostics when an illegal value or shift type is specified. Add aliases to parse an ommitted shift operand (default value of 'lsl #0'). Add tests for diagnostics and proper encoding. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135990 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25Add clarifying comments for the new arguments to UnrollLoop.Andrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135988 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25Refactoring fail.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135986 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25Move CBackend and CppBackend MC initialization to TargetInfo.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135982 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25Get rid of an incorrect optimization for shuffles with PALIGNR and simplify ↵Eli Friedman
isPALIGNRMask. Addresses PR10466, although the crash from that PR only triggers in cases where DAGCombine misses optimizing a shuffle. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135980 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25Fix more MC layering violations.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135979 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25More MC layering violations.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135978 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25Check in updated CMake dependencies after Evan's latest round ofChandler Carruth
refactorings. Several places that shouldn't have dependend on Target no longer do. Also almost all of the CodeGen dependencies have gone away for the MCDisassembler. Others add reasonable dependencies within the target-specific layers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135977 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25Add a missing enumerator to this switch. Currently its in theChandler Carruth
assert-path code, as previously we would have fallen off the end of the function, but please review and let me know if this should go somewhere else. This fixes a Clang warning: lib/MC/MCMachOStreamer.cpp:201:11: error: enumeration value 'MCSA_IndirectSymbol' not handled in switch [-Werror,-Wswitch-enum] switch (Attribute) { ^ 1 error generated. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135976 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25Add LLVMAddTargetLibraryInfo to the C API.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135975 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25Separate MCInstPrinter registration from AsmPrinter registration.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135974 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25Add missing space (this line is no longer pushing the 80-column limit).Nick Lewycky
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135973 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-2580 columns.Nick Lewycky
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135972 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25Fix typo.Nick Lewycky
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135971 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25Simply ARM so_reg MIOperandInfo definitions.Jim Grosbach
The shift immediate encoding, printing, etc. is handled directly by the enclosing operand definition, so it should be a vanilla immediate, not a nested complex operand (shift_imm). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135968 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25Add LLVMAddLowerExpectIntrinsicPass to the C API.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135966 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25Fix last bits of MC layer issues. llvm-mc doesn't need to initialize ↵Evan Cheng
TargetMachine's anymore. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135963 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25ARM asm operand renaming. Make things a bit more explicit.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135959 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25More simple cleanup of ARM asm operand definitions.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135958 91177308-0d34-0410-b5e6-96231b3b80d8
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