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2011-07-28CBZ/CBNZ are Thumb2 only. No need for ARM mode tests for them.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136408 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-28ARM assembly parsing and encoding for BLX (immediate).Jim Grosbach
Add parsing support for BLX (immediate). Since the register operand version is predicated and the label operand version is not, we have to use some special handling to get the operand list right for matching. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136406 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-28Enhance the fixed-length decoder emitter to support parsing scattered fields.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136405 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-28LangRef and basic memory-representation/reading/writing for 'cmpxchg' andEli Friedman
'atomicrmw' instructions, which allow representing all the current atomic rmw intrinsics. The allowed operands for these instructions are heavily restricted at the moment; we can probably loosen it a bit, but supporting general first-class types (where it makes sense) might get a bit complicated, given how SelectionDAG works. As an initial cut, these operations do not support specifying an alignment, but it would be possible to add if we think it's useful. Specifying an alignment lower than the natural alignment would be essentially impossible to support on anything other than x86, but specifying a greater alignment would be possible. I can't think of any useful optimizations which would use that information, but maybe someone else has ideas. Optimizer/codegen support coming soon. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136404 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-28If run with -debug give more information about Cyclic Probability.Jakub Staszak
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136403 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-28Heuristics are in descending priority now. If we use one of them, skip the rest.Jakub Staszak
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136402 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-28Handle REG_SEQUENCE with implicitly defined operands.Jakob Stoklund Olesen
Code like that would only be produced by bugpoint, but we should still handle it correctly. When a register is defined by a REG_SEQUENCE of undefs, the register itself is undef. Previously, we would create a register with uses but no defs. Fixes part of PR10520. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136401 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-28Remove obsolete FIXME reference in comment.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136400 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-28ARM assembly parsing and encoding for BFC and BFI.Jim Grosbach
Add parsing support that handles converting the lsb+width source into the odd way we represent the instruction (an inverted bitfield mask). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136399 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-28Add InEdges (edges from header to the loop) in Loop Branch Heuristics, soJakub Staszak
there is no frequency difference whether condition is in the header or in the latch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136398 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-28Use ArrayRef instead of requiring an std::vector.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136396 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-28The personality function should be a Function* and not just a Value*.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136392 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-28Fix Clang attribute reader tblgen output for a corresponding fix on the ↵Douglas Gregor
Clang side git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136390 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-28Reverse order of RS_Split live ranges under -compact-regions.Jakob Stoklund Olesen
There are two conflicting strategies in play: - Under high register pressure, we want to assign large live ranges first. Smaller live ranges are easier to place afterwards. - Live range splitting is guided by interference, so splitting should be deferred until interference is as realistic as possible. With the recent changes to the live range stages, and with compact regions enabled, it is less traumatic to split a live range too early. If some of the split products were too big, they can often be split again. By reversing the RS_Split order, we get this queue order: 1. Normal live ranges, large to small. 2. RS_Split live ranges, large to small. The large-to-small order improves RAGreedy's puzzle solving skills under high register pressure. It may cause a bit more iterated splitting, but we handle that better now. With this change, -compact-regions is mostly an improvement on SPEC. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136388 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-28Initial code to convert ResumeInsts into calls to _Unwind_Resume.Bill Wendling
This should be the only code necessary for DWARF EH prepare. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136387 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-28Fix stupid mistake from commit 136381.Jakub Staszak
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136384 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-28Speed up BlockFrequencyInfo a little bit.Jakub Staszak
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136381 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-28Add fixme.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136375 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-28Use version 402 for the GCDA files when compiling for Apple.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136369 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-28Update comments.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136367 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-28Fill in some encoding information for STRD instructions.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136366 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-28Revert r136295. It broke nightly testers because some parts of codegen ↵Owen Anderson
weren't aware of the changes to operand ordering. I hope to revive this sometime in the future, but it's not strictly necessary for now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136362 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-28ARM parsing and encoding for ADR.Jim Grosbach
The label does not have a '#' prefix. Add parsing and encoding tests. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136360 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-28Update ARM tests for parsing and encoding of WFE, WFI and YIELD.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136358 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-28CR fix: The ANY_EXTEND can be removed because the input and putput type must beNadav Rotem
identical. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136355 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-28Use unsigned rather than uint16_t in case anyone feels like testingDuncan Sands
more graphs, like all graphs with 5 nodes or less. With a 32 bit unsigned type, the maximum is graphs with 6 nodes or less, but that would take a while to test - 5 nodes or less already requires a few seconds. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136354 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-28Check an additional property specific to the way LLVMDuncan Sands
iterates over SCC's. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136353 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-28Add a unittest for the simply connected components (SCC) iterator class.Duncan Sands
This computes every graph with 4 or fewer nodes, and checks that the SCC class indeed returns exactly the simply connected components reachable from the initial node. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136351 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-28Due to changes coming from the new LLVM type system, you now getDuncan Sands
bitcasts in this test rather than getelementptr instructions; llvm-gcc produces two bitcasts, clang produces one. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136349 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-28This file was moved from Support to ADT. Correct a comment.Duncan Sands
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136344 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-28Some minor cleanups. No functionalitical change.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136341 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-28Leverage some of the code that John wrote to manage the landing pads.Bill Wendling
The new EH is more simple in many respects. Mainly, we don't have to worry about the "llvm.eh.exception" and "llvm.eh.selector" calls being in weird places. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136339 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-28Don't add in the asked for size so that we don't copy too much from the old ↵Bill Wendling
to new vectors. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136338 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-28In DenseMapInfo<pair<T, U>> tombstone key, use the tombstone for T and U insteadNick Lewycky
of the empty key for U. This shouldn't really matter because the tombstone key for the pair was still distinct from every other key, but it is odd. Patch by Michael Ilseman! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136336 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-28Automatically merge the landingpad clauses when we come across a callee'sBill Wendling
landingpad. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136329 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-28Explicitly declare a library dependency of LLVM*Desc toOscar Fuentes
LLVM*AsmPrinter. GenLibDeps.pl fails to detect vtable references. As this is the only referenced symbol from LLVM*Desc to LLVM*AsmPrinter on optimized builds, the algorithm that creates the list of libraries to be linked into tools doesn't know about the dependency and sometimes places the libraries on the wrong order, yielding error messages like this: ../../lib/libLLVMARMDesc.a(ARMMCTargetDesc.cpp.o): In function `llvm::ARMInstPrinter::ARMInstPrinter(llvm::MCAsmInfo const&)': ARMMCTargetDesc.cpp:(.text._ZN4llvm14ARMInstPrinterC1ERKNS_9MCAsmInfoE [llvm::ARMInstPrinter::ARMInstPrinter(llvm::MCAsmInfo const&)]+0x2a): undefined reference to `vtable for llvm::ARMInstPrinter' git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136328 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-28Updated cmake library dependencies.Oscar Fuentes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136327 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-28Make sure that the landingpad instruction takes a Constant* as the clause's ↵Bill Wendling
value. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136326 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-28Add a couple of convenience functions:Bill Wendling
* InvokeInst: Get the landingpad instruction associated with this invoke. * LandingPadInst: A method to reserve extra space for clauses. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136325 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-28Invert the subvector insertion to be more likely to be taken as a COPYBruno Cardoso Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136324 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-28Add patterns to generate copies for extract_subvector instead ofBruno Cardoso Lopes
using vextractf128. This will reduce the number of issued instruction for several avx codes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136323 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-28movd/movq write zeros in the high 128-bit part of the vector. UseBruno Cardoso Lopes
them to match 256-bit scalar_to_vector+zext. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136322 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-28Add a few patterns to match allzeros without having to use the fp unit.Bruno Cardoso Lopes
Take advantage that the 128-bit vpxor zeros the higher part and use it. This also fixes PR10491 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136321 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-28Add SINT_TO_FP and FP_TO_SINT support for v8i32 types. Also moveBruno Cardoso Lopes
a convert pattern close to the instruction definition. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136320 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-28Fix a use after free. An instruction can't be both an intrinsic call and a ↵Benjamin Kramer
fence. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136319 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-28Initial stab at getting inlining working with the EH rewrite.Bill Wendling
This takes the new 'resume' instruction and turns it into a direct jump to the caller's landing pad code. The caller's landingpad instruction is merged with the landingpad instructions of the callee. This is a bit rough and makes some assumptions in how the code works. But it passes a simple test. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136313 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-28ARM parsing and encoding tests.Jim Grosbach
UXTAB, UXTAB16, UXTAH, UXTB, UXTB16, and UXTH. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136312 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-28Add an optional 'bool makeAbsolute' in llvm::sys::fs::unique_file function.Argyrios Kyrtzidis
If true and 'model' parameter is not an absolute path, a temp directory will be prepended. Make it true by default to match current behaviour. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136310 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-27Refactor and improve the encodings/decodings for addrmode3 loads, and make ↵Owen Anderson
the writeback operand always the first. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136295 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-27Emit an error is asm parser parsed X86_64 only registers, e.g. %rax, %sil.Evan Cheng
This can happen in cases where TableGen generated asm matcher cannot check whether a register operand is in the right register class. e.g. mem operands. rdar://8204588 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136292 91177308-0d34-0410-b5e6-96231b3b80d8
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