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2011-07-14Simplify some functions in the C API by using an ArrayRef to directly ↵Frits van Bommel
reference the array passed to them instead of copying it to a std::vector. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135145 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-14[VECTOR-SELECT]Nadav Rotem
During type legalization we often use the SIGN_EXTEND_INREG SDNode. When this SDNode is legalized during the LegalizeVector phase, it is scalarized because non-simple types are automatically marked to be expanded. In this patch we add support for lowering SIGN_EXTEND_INREG manually. This fixes CodeGen/X86/vec_sext.ll when running with the '-promote-elements' flag. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135144 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-14Add assertion for the chain value typeNadav Rotem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135143 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-14Mention all API changes I've made since 2.9 was branched.Jay Foad
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135142 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-14Add a testcase for r135123.Eric Christopher
Part of rdar://9761830 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135133 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-14add C api for hte new type system rewrite API. Patch by Vitaly Lugovskiy!Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135132 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-14Unfortunately several files in MC are badly violating layering rule by usingEvan Cheng
TargetAsmInfo, which in turn pulls in TargetRegisterInfo, etc. :-( There are other cases of violations, but this is probably the worst. This patch is but one small step towards fixing this. 500 more steps to go. :-( git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135131 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-14Reapply r135121 with a fixed copy constructor.Jakob Stoklund Olesen
Original commit message: Count references to interference cache entries. Each InterferenceCache::Cursor instance references a cache entry. A non-zero reference count guarantees that the entry won't be reused for a new register. This makes it possible to have multiple live cursors examining interference for different physregs. The total number of live cursors into a cache must be kept below InterferenceCache::getMaxCursors(). Code generation should be unaffected by this change, and it doesn't seem to affect the cache replacement strategy either. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135130 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-14Simplify.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135127 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-14Don't emit a bit test if there is only one case the test can yield false. A ↵Benjamin Kramer
simple SETNE is sufficient. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135126 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-14Simplify and delay extracting DebugLoc elements, scope and InlinedAt, as ↵Devang Patel
much as possible. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135124 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-14Add a dag combine pattern for folding C2-(A+C1) -> (C2-C1)-AEric Christopher
Fixes rdar://9761830 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135123 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-14Revert r135121 which broke a gcc-4.2 builder.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135122 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-14Count references to interference cache entries.Jakob Stoklund Olesen
Each InterferenceCache::Cursor instance references a cache entry. A non-zero reference count guarantees that the entry won't be reused for a new register. This makes it possible to have multiple live cursors examining interference for different physregs. The total number of live cursors into a cache must be kept below InterferenceCache::getMaxCursors(). Code generation should be unaffected by this change, and it doesn't seem to affect the cache replacement strategy either. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135121 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-14Fix up assertion in r135018 so it doesn't trigger on 32-bit; when we're in ↵Eli Friedman
32-bit, it doesn't matter whether the operation overflows because the computed address is not wider than the immediate. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135120 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-14ARM tests for EOR instruction parsing and encoding.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135119 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-14Simplify. Compile unit check inside hasValidLocation() did not add any value.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135118 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-14Remove duplicate tests.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135117 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-14ARM Assembler support for DSB instruction.Jim Grosbach
Add instalias for default 'sy' option. Add tests. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135116 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-14Reapply r135074 and r135080 with a fix.Jakob Stoklund Olesen
The cache entry referenced by the best split candidate could become clobbered by an unsuccessful candidate. The correct fix here is to use reference counts on the cache entries. Coming up. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135113 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-14DMB instalias needs the same predicate as the instruction.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135112 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-14Fix typo in DEBUG message.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135111 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-14Add DEBUG messages.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135110 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-13ARM Assembler support for DMB instruction.Jim Grosbach
Flesh out the options supported for the instruction. Shuffle tests a bit and add entries for the rest of the options. Add an alias to handle the default operand of "sy". git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135109 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-13Update comments. These are for assembler, too.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135107 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-13Add a target-indepedent entry to MCInstrDesc to describe the encoded size of ↵Owen Anderson
an opcode. Switch ARM over to using that rather than its own special MCInstrDesc bits. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135106 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-13Add code to handle a "frameless" unwind stack.Bill Wendling
The frameless unwind stack has a special encoding, the algorithm for which is in "permuteEncode". git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135103 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-13ARM Assembler support for DBG instruction.Jim Grosbach
Add range checking and testing for parsing and encoding of DBG instruction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135102 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-13We already support 256-bit packed ADD, SUB, DIV, MUL. Add testcases.Bruno Cardoso Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135099 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-13ARM parsing and encoding tests for CMN/CMP.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135098 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-13struct Init -> class InitDavid Greene
Rename struct Init to class Init for consistency and in preparation for making Init a FoldingSetNode. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135097 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-13Revert r135074 and r135080. They broke clamscan.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135096 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-13Shuffle ARM assembly tests a bit.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135095 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-13Revert 135093. Think-o.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135094 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-13Correct range for thumb co-processor immediateJim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135093 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-13Range checking for CDP[2] immediates.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135092 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-13Make X86ISD::ANDNP more general and Codegen 256-bit VANDNP. A moreBruno Cardoso Lopes
general version of X86ISD::ANDNP also opened the room for a little bit of refactoring. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135088 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-13The target specific node PANDN name is misleading. That happens becauseBruno Cardoso Lopes
it's later selected to a ANDNPD/ANDNPS instruction instead of the PANDN instruction. Rename it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135087 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-13Cleanup Thumb co-processor instructions a bit.Jim Grosbach
Combine redundant base classes and such. No indended functional change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135085 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-13Make sure we don't combine a large displacement and a frame index in the ↵Eli Friedman
same addressing mode on x86-64. It can overflow, leading to a crash/miscompile. <rdar://problem/9763308> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135084 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-13Parameterize away the ARM T1Cop class.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135082 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-13Fix predicates for Thumb co-processor instructions.Jim Grosbach
They're all Thumb2 only, not just some of them. More refactoring cleanup coming. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135081 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-13Only keep the global split candidates that work out.Jakob Stoklund Olesen
Some pysical registers create split solutions that would spill anywhere. They should not even be considered in future multi-way global splits. This does not affect code generation (yet). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135080 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-13Refactor out checking for displacements on x86-64 addressing modes. No ↵Eli Friedman
functionality change. Refactoring in preparation for an additional safety check in FoldOffsetIntoAddress. Part of <rdar://problem/9763308>. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135079 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-13Testcases for ARM assembly BX/BXJ instructions.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135078 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-13Fix encoding for ARM BXJ instruction.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135077 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-13Fix encoding of predicate bits on ARM BX_pred.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135076 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-13Move the InterferenceCache cursor into the GlobalSplitCand struct.Jakob Stoklund Olesen
This is in preparation of supporting multiple global split candidates in a single live range split operation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135074 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-13Testcases for ARM assembly BLX/BL instructions.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135072 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-13Range checking for 16-bit immediates in ARM assembly.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135071 91177308-0d34-0410-b5e6-96231b3b80d8
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