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2008-09-01Turn this legalize types test on.Duncan Sands
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55605 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-01Add a small pass that sets the readnone/readonlyDuncan Sands
attributes on functions, based on the result of alias analysis. It's not hardwired to use GlobalsModRef even though this is the only (AFAIK) alias analysis that results in this pass actually doing something. Enable as follows: opt ... -globalsmodref-aa -markmodref ... Advantages of this pass: (1) records the result of globalsmodref in the bitcode, meaning it is available for use by later passes (currently the pass manager isn't smart enough to magically make an advanced alias analysis available to all later passes), which may expose more optimization opportunities; (2) hopefully speeds up compilation when code is optimized twice, for example when a file is compiled to bitcode, then later LTO is done on it: marking functions readonly/readnone when producing the initial bitcode should speed up alias analysis during LTO; (3) good for discovering that globalsmodref doesn't work very well :) Not currently turned on by default. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55604 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-01Control flow instruction encodings.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55601 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-01ldm / stm instruction encodings.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55599 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-01AXI2 and AXI3 instruction encodings.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55598 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-01Reorganize instruction formats again; AXI1 encoding.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55597 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-01addrmode3 instruction encodings.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55596 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-01Reorganize some instruction format definitions. No functionality change.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55594 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-01Rest of addrmode2 instruction encodings.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55593 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-31Addr2 word / byte load encodings.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55591 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-31Addr1 instructions opcodes are encoded in bits 21-24; encode S bit.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55590 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-31fix a bunch of 80-col violationsGabor Greif
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55588 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-31Revert the "XFAIL" for the rotate_ops.ll testcase. Instead, mark ISD::ROTRBill Wendling
instructions in CellSPU as "Expand" so that they won't be generated. I added a "FIXME" so that this hack can be addressed and reverted once ISD::ROTR is supported in the .td files. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55582 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-31Expand for ROTR with MVT::i64.Bill Wendling
Dale, Could you please review this? git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55581 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-31CellSPU doesn't appear to support fully the "ISD::ROTR" operation. The DAGBill Wendling
combiner can now generate ROTR if the backend says that it can handle it. Cell SPU says this, but gets an error from code gen saying that it can't select ROTR. I'm xfailing this test until this can be fixed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55579 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-31Cosmetic changes to Machine LICM. No functionality change.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55578 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-31Another situation where ROTR is cheaper than ROTL.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55577 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-31For this pattern, ROTR is the cheaper option.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55576 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-31- Fix comment so that it describes how the code really works:Bill Wendling
// fold (or (shl x, (*ext y)), (srl x, (*ext (sub 32, y)))) -> // (rotl x, y) // fold (or (shl x, (*ext y)), (srl x, (*ext (sub 32, y)))) -> // (rotr x, (sub 32, y)) Example: (x == 0xDEADBEEF and y == 4) (x << 4) | (x >> 28) => 0xEADBEEF0 | 0x0000000D => 0xEADBEEFD (rotl x, 4) => 0xEADBEEFD (rotr x, 28) => 0xEADBEEFD - Fix comment and code for second version. It wasn't using the rot* propertly. // fold (or (shl x, (*ext (sub 32, y))), (srl x, (*ext r))) -> // (rotr x, y) // fold (or (shl x, (*ext (sub 32, y))), (srl x, (*ext r))) -> // (rotl x, (sub 32, y)) (x << 28) | (x >> 4) => 0xD0000000 | 0x0DEADBEE => 0xDDEADBEE (rotl x, 4) => 0xEADBEEFD (rotr x, 28) => (0xEADBEEFD) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55575 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-30typoGabor Greif
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55574 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-30fix some 80-col violationsGabor Greif
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55571 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-30PR2731: C and Ocaml bindings for setTailCall and isTailCall.Gordon Henriksen
Based on patch by Giorgos Korfiatis. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55570 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-30Fix ConstantExpr::getInsertElement.Gordon Henriksen
Breakage was exposed in the Ocaml bindings tests after Chris uncommented an assertion in r55084. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55566 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-30fix some 80-col violationsGabor Greif
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55565 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-30Re-apply 55467 with fix. If copy is being replaced by remat'ed def, transfer ↵Evan Cheng
the implicit defs onto the remat'ed instruction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55564 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-30Fold isRematerializable checks into isSafeToReMat.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55563 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-30For now, can't mark XOR64rr isAsCheapAsAMove. It's technically correct. But ↵Evan Cheng
various passes cannot handle remating these. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55562 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-30Transform (x << (y&31)) -> (x << y). This takes advantage of the fact x86 ↵Evan Cheng
shift instructions 2nd operand (shift count) is limited to 0 to 31 (or 63 in the x86-64 case). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55558 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-30Enable -fvisibility-inlines-hidden by default for compilers whichDaniel Dunbar
support it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55557 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-30Testcases for ppc atomics.Dale Johannesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55556 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-30Fix an issue where a use might be selected before a def, and then we didn't ↵Owen Anderson
respect the pre-chosen vreg assignment when selecting the def. This is the naive solution to the problem: insert a copy to the pre-chosen vreg. Other solutions might be preferable, such as: 1) Passing the dest reg into FastEmit_. However, this would require the higher level code to know about reg classes, which they don't currently. 2) Selecting blocks in reverse postorder. This has some compile time cost for computing the order, and we'd need to measure its impact. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55555 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-30Add ppc partial-word ATOMIC_CMP_SWAP.Dale Johannesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55554 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-29Swap fp comparison operands and change predicate to allow load folding ↵Evan Cheng
(safely this time). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55553 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-29Use static_cast instead of C style cast.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55552 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-29Fix 80 col. violations.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55551 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-29xfail this.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55550 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-29Back out 55498. It broken Apple style bootstrapping.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55549 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-29Backing out 55521. Not safe.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55548 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-29Add partial word version of ATOMIC_SWAP.Dale Johannesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55546 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-29Add initial support for fast isel of instructions that have inputs pinned to ↵Owen Anderson
physical registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55545 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-29regenerateChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55542 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-29Asmprint nameless instructions as:Chris Lattner
%4 = add ... instead of: add ... ; 4 This makes opt -print-cfg output actually usable and makes .ll files generally easier to read. This fixes PR2480 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55541 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-29allow this to pass.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55540 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-29Add support for parsing .ll files that have numbers in front ofChris Lattner
nameless values, such as: %3 = add i32 4, 2 This fixes the first half of PR2480 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55539 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-29TableGen'ing instruction encodings.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55533 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-29addrmode1 (data processing) instruction encoding: bits 5-6 are 0, bits 7-10 ↵Evan Cheng
encode the opcode. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55531 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-29MVN is addrmode1.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55530 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-29Add GlobalValue::{removeFromParent,eraseFromParent}Daniel Dunbar
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55529 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-29More refactoring.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55528 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-29Add DenseMap::lookup:Daniel Dunbar
/// lookup - Return the entry for the specified key, or a default /// constructed value if no such entry exists. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55523 91177308-0d34-0410-b5e6-96231b3b80d8