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2011-04-05Fix test-llvm failures.Johnny Chen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128906 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-05whitespaceAndrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128905 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-05An MCDisassembler has the option to not implementShantonu Sen
getEDInfo(), in which case this code would dereference NULL. EDInst can already handle NULL info, so avoid the dereference and pass NULL through. Reviewed by Sean Callanan git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128904 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-05Make second source operand of LDRD pre/post explicit.Jim Grosbach
Finish what r128736 started. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128903 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-05more notes to self.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128902 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-05Constants with multiple encodings (ARM):Johnny Chen
An alternative syntax is available for a modified immediate constant that permits the programmer to specify the encoding directly. In this syntax, #<const> is instead written as #<byte>,#<rot>, where: <byte> is the numeric value of abcdefgh, in the range 0-255 <rot> is twice the numeric value of rotation, an even number in the range 0-30. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128897 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-05Check for invalid register encodings for UMAAL and friends where:Johnny Chen
if dLo == 15 || dHi == 15 || n == 15 || m == 15 then UNPREDICTABLE; if dHi == dLo then UNPREDICTABLE; rdar://problem/9230202 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128895 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-05Convert ADCS and SBCS instructions into pseudos that are expanded to the ↵Owen Anderson
ADC/ABC with the appropriate S-bit input value. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128892 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-05ARM doesn't support byval yet. XFAIL this test until it does.Stuart Hastings
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128891 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-05Rename LLVMConfig.cmake to LLVM-Config.cmake. The *Config.cmake namingOscar Fuentes
scheme is used by the functionality related to find_package. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128889 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-05Ensure all defs referring to a virtual register are marked dead by ↵Jakob Stoklund Olesen
addRegisterDead(). There can be multiple defs for a single virtual register when they are defining sub-registers. The missing <dead> flag was stopping the inline spiller from eliminating dead code after rematerialization. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128888 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-05Print visibility info for external variables.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128887 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-05Use std::unique instead of a SmallPtrSet to ensure unique instructions in ↵Jakob Stoklund Olesen
UseSlots. This allows us to always keep the smaller slot for an instruction which is what we want when a register has early clobber defines. Drop the UsingInstrs set and the UsingBlocks map. They are no longer needed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128886 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-05InstCombine optimizes gep(bitcast(x)) even when the bitcasts casts away addressNadav Rotem
space info. We crash with an assert in this case. This change checks that the address space of the bitcasted pointer is the same as the gep ptr. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128884 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-05docs/ReleaseNotes.html: Add a few notes to MCCOFF and x64. FIXME: fixme!NAKAMURA Takumi
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128882 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-05docs/GettingStarted.html: FIXME: dg, lit, and source tree layout.NAKAMURA Takumi
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128881 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-05add a bunch of notes to myself, this is not intended to be gramatic orChris Lattner
make sense to anyone else. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128879 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-05Stop precomputing last split points, query the SplitAnalysis cache on demand.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128875 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-05Cache the fairly expensive last split point computation and provide a fastJakob Stoklund Olesen
inlined path for the common case. Most basic blocks don't contain a call that may throw, so the last split point os simply the first terminator. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128874 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-05Revamp the SjLj "dispatch setup" intrinsic.Bill Wendling
It needed to be moved closer to the setjmp statement, because the code directly after the setjmp needs to know about values that are on the stack. Also, the 'bitcast' of the function context was causing a dead load. This wouldn't be too horrible, except that at -O0 it wasn't optimized out, and because it wasn't using the correct base pointer (if there is a VLA), it would try to access a value from a garbage address. <rdar://problem/9130540> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128873 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-05Fix up testcase for previous commit.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128870 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-05Just use BL all the time. It's safer that way.Eric Christopher
Fixes rdar://9184526 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128869 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-05Revert 123704; it broke threaded LLVM.Stuart Hastings
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128868 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-05Fix register-dependent X86 tests.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128867 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-05Fix SRS/SRSW encoding bits.Johnny Chen
rdar://problem/9230801 ARM disassembler discrepancy: erroneously accepting SRS Plus add invalid-RFEorLDMIA-arm.txt test which should have been checked in with http://llvm.org/viewvc/llvm-project?view=rev&revision=128859. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128864 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-04A8.6.105 MULJohnny Chen
Inst{15-12} should be specified as 0b0000. rdar://problem/9231168 ARM disassembler discrepancy: erroneously accepting MUL git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128862 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-04Add info on where to get 2.9 final svn sources.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128860 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-04RFE encoding should also specify the "should be" encoding bits.Johnny Chen
rdar://problem/9229922 ARM disassembler discrepancy: erroneously accepting RFE Also LDC/STC instructions are predicated while LDC2/STC2 instructions are not, fixed while doing regression testings. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128859 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-04Add missing file from r128851.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128856 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-04Layer the memory manager between the JIT and the runtime Dyld.Jim Grosbach
The JITMemory manager references LLVM IR constructs directly, while the runtime Dyld works at a lower level and can handle objects which may not originate from LLVM IR. Introduce a new layer for the memory manager to handle the interface between them. For the MCJIT, this layer will be almost entirely simply a call-through w/ translation between the IR objects and symbol names. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128851 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-04Make OpcodeMask an unsigned long long literal to deal with overflow.Joerg Sonnenberger
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128847 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-04Allow coalescing with reserved physregs in certain cases:Jakob Stoklund Olesen
When a virtual register has a single value that is defined as a copy of a reserved register, permit that copy to be joined. These virtual register are usually copies of the stack pointer: %vreg75<def> = COPY %ESP; GR32:%vreg75 MOV32mr %vreg75, 1, %noreg, 0, %noreg, %vreg74<kill> MOV32mi %vreg75, 1, %noreg, 8, %noreg, 0 MOV32mi %vreg75<kill>, 1, %noreg, 4, %noreg, 0 CALLpcrel32 ... Coalescing these virtual registers early decreases register pressure. Previously, they were coalesced by RALinScan::attemptTrivialCoalescing after register allocation was completed. The lower register pressure causes the mcinst-lowering-cmp0.ll test case to fail because it depends on linear scan spilling a particular register. I am deleting 2008-08-05-SpillerBug.ll because it is counting the number of instructions emitted, and its revision history shows the 'correct' count being edited many times. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128845 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-04Extract physreg joining policy to a separate method.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128844 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-04Fix incorrect alignment for NEON VST2b32_UPD.Johnny Chen
rdar://problem/9225433 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128841 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-04Update BreakpointPrinter to emit original function names only. Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128839 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-04Insert code in the right location when lowering PowerPC atomics.Jakob Stoklund Olesen
This causes defs to dominate uses, no instructions after terminators, and other goodness. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128836 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-04Disable the PowerPC/Atomics-64 test.Jakob Stoklund Olesen
The code inserted by PPCTargetLowering::EmitInstrWithCustomInserter for ppc64 is wrong, and I don't know how to fix it. It seems to be using the correct register classes for pointers, but it inserts all 32-bit instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128835 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-04Remove unused function.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128834 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-04- Implement asm parsing support for LDRSBT, LDRHT, LDRSHT and STRHTBruno Cardoso Lopes
also fix the encoding of the later. - Add a new encoding bit to describe the index mode used in AM3. - Teach printAddrMode3Operand to check by the addressing mode which index mode to print. - Testcases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128832 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-04silence an unused function warning.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128831 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-04Move transformation of JmpLink and related nodes done during instruction ↵Akira Hatanaka
selection to Legalize phase. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128830 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-04PowerPC atomic pseudos clobber CR0, they don't read it.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128829 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-04Use X0 instead of R0 for the zero register on ppc64.Jakob Stoklund Olesen
The 32-bit R0 cannot be used where a 64-bit register is expected. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128828 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-04Fix PowerPC tests to be register allocator independent.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128827 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-04Add support for the VIA PadLock instructions.Joerg Sonnenberger
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128826 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-04Use array_lengthofJoerg Sonnenberger
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128823 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-04Expand Op0Mask by one bit in preparation for the PadLock prefixes.Joerg Sonnenberger
Define most shift masks incrementally to reduce the redundant hard-coding. Introduce new shift for the VEX flags to replace the magic constant 32 in various places. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128822 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-04Stop caching basic block index ranges now that SlotIndexes can keep up.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128821 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-04Delete leftover data members.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128820 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-04Change loops to derive the number of tables automaticallyJoerg Sonnenberger
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128818 91177308-0d34-0410-b5e6-96231b3b80d8
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