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2011-07-07Added a testcase for PR10220.Lang Hames
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134573 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-07Add DEBUG messages.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134572 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-07Factor ARM triple parsing out of ARMSubtarget. Another step towards making ↵Evan Cheng
ARM subtarget info available to MC. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134569 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-07Use DBG_VALUE location while inserting DBG_VALUE during alloca promotion.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134568 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-06Fix a bug in the "expect" intrinsic lowering.Jakub Staszak
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134566 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-06When tail-merging multiple blocks, make sure to correctly update the live-in ↵Eli Friedman
list on the merged block to correctly account for the live-outs of all the predecessors. They might not be the same in all cases (the testcase I have involves a PHI node where one of the operands is an IMPLICIT_DEF). Unfortunately, the testcase I have is large and confidential, so I don't have a test to commit at the moment; I'll see if I can come up with something smaller where this issue reproduces. <rdar://problem/9716278> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134565 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-06Typo.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134563 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-06Remove dead code.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134561 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-06Typo.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134559 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-06Clean up the #includes.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134557 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-06Grammar and 80-col.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134555 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-06Fix a subtle issue in SmallVector. The following code did not work as expected:Owen Anderson
vec.insert(vec.begin(), vec[3]); The issue was that vec[3] returns a reference into the vector, which is invalidated when insert() memmove's the elements down to make space. The method needs to specifically detect and handle this case to correctly match std::vector's semantics. Thanks to Howard Hinnant for clarifying the correct behavior, and explaining how std::vector solves this problem. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134554 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-06Handle cases where multiple dbg.declare and dbg.value intrinsics are tied to ↵Devang Patel
one alloca. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134549 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-06Add ARM MC registry routines.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134547 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-06Rename files for consistency.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134546 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-06Add ImmutableList::contains(). Patch by Rui Paulo!Nick Lewycky
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134545 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-06Mark ARM pseudo-instructions as isPseudo.Jim Grosbach
This allows us to remove the (bogus and unneeded) encoding information from the pseudo-instruction class definitions. All of the pseudos that haven't been converted yet and still need encoding information instance from the normal instruction classes and explicitly set isCodeGenOnly, and so are distinct from this change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134540 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-06Don't require pseudo-instructions to carry encoding information.Jim Grosbach
For now this is distinct from isCodeGenOnly, as code-gen-only instructions can (and often do) still have encoding information associated with them. Once we've migrated all of them over to true pseudo-instructions that are lowered to real instructions prior to the printer/emitter, we can remove isCodeGenOnly and just use isPseudo. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134539 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-06Simplify. Consolidate dbg.declare handling in AllocaPromoter.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134538 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-06indvars -disable-iv-rewrite: ExprToMap lives in Pass data, so be moreAndrew Trick
careful about referencing values. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134537 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-06Remove un-used encoding info from Pseudo MLAv5.Jim Grosbach
Pseudo-instructions don't have encoding information, as they're lowered to real instructions by the time we're doing binary encoding. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134533 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-06Fix missing triple support for RTEMS target.Eli Friedman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134532 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-06indvars -disable-iv-rewrite: Added SimplifyCongruentIVs.Andrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134530 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-06Remove some unnecessary includes.Eli Friedman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134528 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-06Constify getCompactUnwindRegNum.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134527 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-06createMCInstPrinter doesn't need TargetMachine anymore.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134525 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-06LICM: Remove trailing white spacesTobias Grosser
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134521 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-06LICM: Do not loose alignment on promotionTobias Grosser
The promotion code lost any alignment information, when hoisting loads and stores out of the loop. This lead to incorrect aligned memory accesses. We now use the largest alignment we can prove to be correct. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134520 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-06Add documenation about "branch_weight" metadata and __builtin_expect instructionJakub Staszak
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134517 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-06Introduce "expect" intrinsic instructions.Jakub Staszak
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134516 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-06Update MC/ELF/relocation.s with change to X86 PUSH64i8 in r134501.Kevin Enderby
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134511 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-06Changed the X86 PUSH64i8 record to use the i64i8imm ParserMatchClass so that aKevin Enderby
push with a small constant produces a 2-byte push. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134501 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-06Allow tagless builds and fix debug build configuration.David Greene
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134498 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-06Remove the AsmWriterEmitter (unused) feature that rely on TargetSubtargetInfo.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134457 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-05Revert r134366 and add an explicit triple to make this test host-independent.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134447 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-05Remove the ObjC ARC passes from the default optimization list, and addDan Gohman
extension points to be used by clang. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134444 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-05Preserve debug loc.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134441 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-05Speculatively revert r134431.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134440 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-05Use memcmp.Benjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134439 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-05Really fix typo :-(Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134436 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-05Fix typo.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134433 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-05Clear debug loc while updating insert point.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134431 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-05By default mkstemp() creates a temporary file with mode 0600, but the modeChad Rosier
used for open is 0666. Therefore, add the necessary permission bits for consistency. rdar://8621462 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134430 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-05Break infinite loop when the Hopfield network oscillates.Jakob Stoklund Olesen
This is impossible in theory, I can prove it. In practice, our near-zero threshold can cause the network to oscillate between equally good solutions. <rdar://problem/9720596> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134428 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-05Compare all 4 bytes of the header.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134427 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-05Add assembler/disassembler support for non-AVX pclmulqdq. While I'm here, ↵Eli Friedman
use proper aliases for the pclmullqlqdq and friends. PR10269. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134424 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-05indvars -disable-iv-rewrite: avoid multiple IVs in weird cases.Andrew Trick
Putting back the helper that I removed on 7/1 to do this right. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134423 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-05ARM estimateStackSize() needs to account for simplified call frames.Jim Grosbach
If the function allocates reserved stack space for callee argument frames, estimateStackSize() needs to account for that, as it doesn't show up as ordinary frame objects. Otherwise, a callee with a large argument list will throw off the calculations for whether to allocate an emergency spill slot and we get assert() failures in the register scavenger. rdar://9715469 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134415 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-05Fix PR10277.Jakob Stoklund Olesen
Remat during spilling triggers dead code elimination. If a phi-def becomes unused, that may also cause live ranges to split into separate connected components. This type of splitting is different from normal live range splitting. In particular, there may not be a common original interval. When the split range is its own original, make sure that the new siblings are also their own originals. The range being split cannot be used as an original since it doesn't cover the new siblings. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134413 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-05Tweak comment and debug output.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134412 91177308-0d34-0410-b5e6-96231b3b80d8
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