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2012-09-15Disable new sroa now that all buildbots have tested it.Benjamin Kramer
What we have so far: - Some clang test failures (these were known already) - Perf results are mixed, some big regressions http://llvm.org/perf/db_default/v4/nts/3844 http://llvm.org/perf/db_default/v4/nts/3845 bullet suffers a lot. matmul is interesting: slower scalar code, faster with -vectorize. - Some dragonegg selfhost bots crash in SROA during selfhost now http://lab.llvm.org:8011/builders/dragonegg-x86_64-linux-gcc-4.6-self-host-checks/builds/1632 http://lab.llvm.org:8011/builders/dragonegg-x86_64-linux-gcc-4.5-self-host/builds/1891 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163968 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-15X86: Emitting x87 fsin/fcos for sinf/cosf is not safe without unsafe fp math.Benjamin Kramer
This was only an issue if sse is disabled. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163967 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-15Port the SSAUpdater-based promotion logic from the old SROA pass to theChandler Carruth
new one, and add support for running the new pass in that mode and in that slot of the pass manager. With this the new pass can completely replace the old one within the pipeline. The strategy for enabling or disabling the SSAUpdater logic is to do it by making the requirement of the domtree analysis optional. By default, it is required and we get the standard mem2reg approach. This is usually the desired strategy when run in stand-alone situations. Within the CGSCC pass manager, we disable requiring of the domtree analysis and consequentially trigger fallback to the SSAUpdater promotion. In theory this would allow the pass to re-use a domtree if one happened to be available even when run in a mode that doesn't require it. In practice, it lets us have a single pass rather than two which was simpler for me to wrap my head around. There is a hidden flag to force the use of the SSAUpdater code path for the purpose of testing. The primary testing strategy is just to run the existing tests through that path. One notable difference is that it has custom code to handle lifetime markers, and one of the tests has been enhanced to exercise that code. This has survived a bootstrap and the test suite without serious correctness issues, however my run of the test suite produced *very* alarming performance numbers. I don't entirely understand or trust them though, so more investigation is on-going. To aid my understanding of the performance impact of the new SROA now that it runs throughout the optimization pipeline, I'm enabling it by default in this commit, and will disable it again once the LNT bots have picked up one iteration with it. I want to get those bots (which are much more stable) to evaluate the impact of the change before I jump to any conclusions. NOTE: Several Clang tests will fail because they run -O3 and check the result's order of output. They'll go back to passing once I disable it again. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163965 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-15Remove aligned/unaligned load/store fragments defined in MipsInstrInfo.td andAkira Hatanaka
use load/store fragments defined in TargetSelectionDAG.td in place of them. Unaligned loads/stores are either expanded or lowered to target-specific nodes, so instruction selection should see only aligned load/store nodes. No changes in functionality. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163960 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-15Revert r163878 as it breaks on targets with alternate register names. Such ↵Craig Topper
targets do not exist in the main tree so this was not noticed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163959 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-15Handled unaligned load/stores properly in Mips16 Akira Hatanaka
Patch by Reed Kotler. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163956 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-15PGO: preserve branch-weight metadata when simplifying two branches with a commonManman Ren
destination. Updated previous implementation to fix a case not covered: // PBI: br i1 %x, TrueDest, BB // BI: br i1 %y, TrueDest, FalseDest The other case was handled correctly. // PBI: br i1 %x, BB, FalseDest // BI: br i1 %y, TrueDest, FalseDest Also tried to use 64-bit arithmetic instead of APInt with scale to simplify the computation. Let me know if you have other opinions about this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163954 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-15TableGen subtarget parser. Handle new machine model.Andrew Trick
Collect processor resources from the subtarget defs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163953 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-15TableGen subtarget parser. Handle new machine model.Andrew Trick
Infer SchedClasses from variants defined by the target or subtarget. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163952 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-15TableGen subtarget parser. Handle new machine model.Andrew Trick
Collect SchedClasses and SchedRW types from the subtarget defs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163951 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-14cmake: Fix file path.Daniel Dunbar
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163950 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-14formatted_raw_ostream: Fix a serious bug in tell().Daniel Dunbar
- The current_pos function is supposed to return all the written bytes, not the current position of the underlying stream. - This caused tell() to be broken whenever the underlying stream had buffered content. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163948 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-14Some small reorganization to get read for Attributes overhaul.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163947 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-14Remove comment.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163945 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-14Fix up erroneous alignas usage while making this portable to GCC 4.7David Blaikie
Review by Chandler Carruth. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163944 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-14PGO: preserve branch-weight metadata when simplifying a switch with a singleManman Ren
case to a conditional branch and when removing dead cases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163942 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-14Stylistic and 80-col fixesEvan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163940 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-14comment typoAndrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163935 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-14TargetSchedModel interface. To be implemented...Andrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163934 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-14Define MC data tables for the new scheduling machine model.Andrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163933 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-14whitespaceAndrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163932 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-14Review feedback from Duncan Sands. Alphabetize includes and simplifyAlex Rosenberg
lit config. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163928 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-14Try to fix the bots by detecting inconsistant branch-weight metadata.Manman Ren
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163926 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-14Implement getNumLDMAddresses and expose through ARMBaseInstrInfo.Andrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163922 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-14Cortex-A9 instruction-level scheduling machine model.Andrew Trick
This models the A9 processor at the level of instruction operands, as opposed to the itinerary, which models each operation at the level of pipeline stages. The two primary motivations are: 1) Allow MachineScheduler to model A9 as an out-of-order processor. It can now distinguish between hazards that force interlocking vs. buffered resources. 2) Reduce long-term maintenance by allowing the itinerary and target hooks to eventually be removed. Note that almost all of the complexity in the new model exists to model instruction variants, which the itinerary cannot handle. Instead the scheduler previously relied on processor-specific target hooks which are incomplete and buggy. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163921 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-14PGO: preserve branch-weight metadata when merging two switches whereManman Ren
the default target of the first switch is not the basic block the second switch is in (PredDefault != BB). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163916 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-14misched: add a hook for custom DAG postprocessing.Andrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163915 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-14Add in comments that explain what the indexing and the size of the arrays is ↵Micah Villmow
about. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163904 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-14DAG post-process for Hexagon MI schedulerSergei Larin
This patch introduces a possibility for Hexagon MI scheduler to perform some target specific post- processing on the scheduling DAG prior to scheduling. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163903 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-14Fix Doxygen issues:Dmitri Gribenko
* wrap code blocks in \code ... \endcode; * refer to parameter names in paragraphs correctly (\arg is not what most people want -- it starts a new paragraph); * use \param instead of \arg to document parameters in order to be consistent with the rest of the codebase. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163902 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-14SROA: Silence unused variable warnings in Release builds.Benjamin Kramer
The NDEBUG hack is ugly, but I see no better solution. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163900 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-14Remove redundant private field.Benjamin Kramer
clang warned about this being unused in Release builds. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163899 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-14Rework the computation of a sub-structure natural type. There wereChandler Carruth
pointless checks in here, bad asserts, and just confusing code. I've also added a bit more to the comment to clarify what this function is really trying to do as it was not obvious to Duncan when studying it. Thanks to Duncan for helping me dig through the issue. No real functionality changed here in practical cases, and certainly no test case. This is just cleanup spotted by inspection. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163897 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-14Rely on the recursive check for pointer types rather than adding anChandler Carruth
explicit check before recursing. A simplification requested by Duncan during review. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163896 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-14Be a bit more aggressive in bailing out of this routine. Spotted byChandler Carruth
inspection by Duncan during review. My suspicion is that we would still have returned 0 anyways in this case, but doing it sooner is better. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163895 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-14Add some comments clarifying that the GEP analysis for vector GEPs isChandler Carruth
deeply suspicious and likely to go away eventually. Also fix a bogus comment about one of the checks in the vector GEP analysis. Based on review from Duncan. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163894 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-14Move an instance variable to a local variable based on review by Duncan.Chandler Carruth
Originally I had anticipated needing to thread this through more bits of the SROA pass itself, but that ended up not happening. In the end, this is a much simpler way to manange the variable. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163893 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-14Add a comment about debug intrinsics that I *really* don't want toChandler Carruth
forget from Duncan's review as a FIXME. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163892 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-14Add two asserts that Duncan thought would help ensure things don't rotChandler Carruth
unexpectedly in the future. More fixes from his code review. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163891 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-14Actually keep the flag default-off for now. =/ That's what I get forChandler Carruth
being busy testing this... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163890 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-14Remove some dead, commented out code Duncan spotted in review.Chandler Carruth
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163889 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-14Wrap the dumping and printing routines in NDEBUG and LLVM_ENABLE_DUMP macros.Chandler Carruth
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163888 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-14Lots of comment fixes and cleanups from Duncan's review.Chandler Carruth
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163887 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-14SROA.cpp: Unbreak gcc, sorry!NAKAMURA Takumi
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163886 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-14SROA.cpp: Appease msvc. LLVM_ATTRIBUTE(s) should come front of "const".NAKAMURA Takumi
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163885 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-14Speculative change to try to fix older GCC versions that can't handleChandler Carruth
the injected class name of a dependent base class here. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163884 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-14Introduce a new SROA implementation.Chandler Carruth
This is essentially a ground up re-think of the SROA pass in LLVM. It was initially inspired by a few problems with the existing pass: - It is subject to the bane of my existence in optimizations: arbitrary thresholds. - It is overly conservative about which constructs can be split and promoted. - The vector value replacement aspect is separated from the splitting logic, missing many opportunities where splitting and vector value formation can work together. - The splitting is entirely based around the underlying type of the alloca, despite this type often having little to do with the reality of how that memory is used. This is especially prevelant with unions and base classes where we tail-pack derived members. - When splitting fails (often due to the thresholds), the vector value replacement (again because it is separate) can kick in for preposterous cases where we simply should have split the value. This results in forming i1024 and i2048 integer "bit vectors" that tremendously slow down subsequnet IR optimizations (due to large APInts) and impede the backend's lowering. The new design takes an approach that fundamentally is not susceptible to many of these problems. It is the result of a discusison between myself and Duncan Sands over IRC about how to premptively avoid these types of problems and how to do SROA in a more principled way. Since then, it has evolved and grown, but this remains an important aspect: it fixes real world problems with the SROA process today. First, the transform of SROA actually has little to do with replacement. It has more to do with splitting. The goal is to take an aggregate alloca and form a composition of scalar allocas which can replace it and will be most suitable to the eventual replacement by scalar SSA values. The actual replacement is performed by mem2reg (and in the future SSAUpdater). The splitting is divided into four phases. The first phase is an analysis of the uses of the alloca. This phase recursively walks uses, building up a dense datastructure representing the ranges of the alloca's memory actually used and checking for uses which inhibit any aspects of the transform such as the escape of a pointer. Once we have a mapping of the ranges of the alloca used by individual operations, we compute a partitioning of the used ranges. Some uses are inherently splittable (such as memcpy and memset), while scalar uses are not splittable. The goal is to build a partitioning that has the minimum number of splits while placing each unsplittable use in its own partition. Overlapping unsplittable uses belong to the same partition. This is the target split of the aggregate alloca, and it maximizes the number of scalar accesses which become accesses to their own alloca and candidates for promotion. Third, we re-walk the uses of the alloca and assign each specific memory access to all the partitions touched so that we have dense use-lists for each partition. Finally, we build a new, smaller alloca for each partition and rewrite each use of that partition to use the new alloca. During this phase the pass will also work very hard to transform uses of an alloca into a form suitable for promotion, including forming vector operations, speculating loads throguh PHI nodes and selects, etc. After splitting is complete, each newly refined alloca that is a candidate for promotion to a scalar SSA value is run through mem2reg. There are lots of reasonably detailed comments in the source code about the design and algorithms, and I'm going to be trying to improve them in subsequent commits to ensure this is well documented, as the new pass is in many ways more complex than the old one. Some of this is still a WIP, but the current state is reasonbly stable. It has passed bootstrap, the nightly test suite, and Duncan has run it successfully through the ACATS and DragonEgg test suites. That said, it remains behind a default-off flag until the last few pieces are in place, and full testing can be done. Specific areas I'm looking at next: - Improved comments and some code cleanup from reviews. - SSAUpdater and enabling this pass inside the CGSCC pass manager. - Some datastructure tuning and compile-time measurements. - More aggressive FCA splitting and vector formation. Many thanks to Duncan Sands for the thorough final review, as well as Benjamin Kramer for lots of review during the process of writing this pass, and Daniel Berlin for reviewing the data structures and algorithms and general theory of the pass. Also, several other people on IRC, over lunch tables, etc for lots of feedback and advice. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163883 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-14Remove silly dead store. Patch by Ettl Martin.Duncan Sands
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163882 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-14Allow the second opcode info table to be 8, 16, or 32-bits as needed to ↵Craig Topper
represent additional fragments. This recovers some space on ATT X86 syntax and PowerPC which only need 40-bits instead of 48-bits. This also increases ARM to 64-bits to fully encode all of its operands. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163880 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-14Reduce size of register name index tables by using uint16_t for all in tree ↵Craig Topper
targets. If more than 16-bits are needed for any out of tree targets, code will detect and use uint32_t instead. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163878 91177308-0d34-0410-b5e6-96231b3b80d8