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2012-09-07Add IRC handle entry to CREDITS.TXT as a test commit.Alex Rosenberg
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163423 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-07Correct an unfortunately necessary typo.Sandeep Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163422 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-07Fix alignment of .comm and .lcomm on mingw32.Benjamin Kramer
For some reason .lcomm uses byte alignment and .comm log2 alignment so we can't use the same setting for both. Fix this by reintroducing the LCOMM enum. I verified this against mingw's gcc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163420 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-07Initial relocations test for the Mips standalone assembler.Jack Carter
This is not an exhaustive set, but something we can build on. Contributer: Vladimir Medic git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163419 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-07Fix indent.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163416 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-07Contrary to what the documentation says, .lcomm alignment on COFF is in ↵Benjamin Kramer
bytes, not power of 2. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163405 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-07Update function names to conform to guidelines. No functional change intended.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163401 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-07Custom DAGCombine for and/or/xor are for all ARMs.Jakob Stoklund Olesen
The 'select' transformations apply to all ARM architectures and don't require hasV6T2Ops. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163396 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-07MC: Overhaul handling of .lcommBenjamin Kramer
- Darwin lied about not supporting .lcomm and turned it into zerofill in the asm parser. Push the zerofill-conversion down into macho-specific code. - This makes the tri-state LCOMMType enum superfluous, there are no targets without .lcomm. - Do proper error reporting when trying to use .lcomm with alignment on a target that doesn't support it. - .comm and .lcomm alignment was parsed in bytes on COFF, should be power of 2. - Fixes PR13755 (.lcomm crashes on ELF). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163395 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-07PR13754: llvm-mc/x86 crashes on .cfi directives without the % prefix for ↵Benjamin Kramer
registers. gas accepts this and it seems to be common enough to be worth supporting. This doesn't affect the parsing of reg operands outside of .cfi directives. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163390 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-07MipsAsmParser: Fix a couple of string use-after-frees and misuses of classof.Benjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163383 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-07yet another attempt at fixing @OCAMLOPT@ for sed.Nuno Lopes
Patch by Rick Foos. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163380 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-07SimplifyCFG: ValidLookupTableConstant should be staticHans Wennborg
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163378 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-07Add -exact-match option to FileCheck to allow clients to do exact matches ↵Ted Kremenek
without using regular expressions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163371 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-07Stop emitting lifetime region info when stack coloring is not enabled in O0Michael Liao
- this should fix PR13780 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163370 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-07The Mips standalone assembler aliased instruction support.Jack Carter
The assembler can alias one instruction into another based on the operands. For example the jump instruction "J" takes and immediate operand, but if the operand is a register the assembler will change it into a jump register "JR" instruction. These changes are in the instruction td file. Test cases included Contributer: Vladimir Medic git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163368 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-07The Mips standalone assembler intial directive support.Jack Carter
Actually these are just stubs for parsing the directives. Semantic support will come later. Test cases included Contributer: Vladimir Medic git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163364 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-07The Mips standalone assembler fpu instruction support.Jack Carter
Test cases included Contributer: Vladimir Medic git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163363 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-06Re-work bit/bits value resolving in tblgenMichael Liao
- This patch is inspired by the failure of the following code snippet which is used to convert enumerable values into encoding bits to improve the readability of td files. class S<int s> { bits<2> V = !if(!eq(s, 8), {0, 0}, !if(!eq(s, 16), {0, 1}, !if(!eq(s, 32), {1, 0}, !if(!eq(s, 64), {1, 1}, {?, ?})))); } Later, PR8330 is found to report not exactly the same bug relevant issue to bit/bits values. - Instead of resolving bit/bits values separately through resolveBitReference(), this patch adds getBit() for all Inits and resolves bit value by resolving plus getting the specified bit. This unifies the resolving of bit with other values and removes redundant logic for resolving bit only. In addition, BitsInit::resolveReferences() is optimized to take advantage of this origanization by resolving VarBitInit's variable reference first and then getting bits from it. - The type interference in '!if' operator is revised to support possible combinations of int and bits/bit in MHS and RHS. - As there may be illegal assignments from integer value to bit, says assign 2 to a bit, but we only check this during instantiation in some cases, e.g. bit V = !if(!eq(x, 17), 0, 2); Verbose diagnostic message is generated when invalid value is resolveed to help locating the error. - PR8330 is fixed as well. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163360 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-06Remove unused variable introduced by r163346.David Blaikie
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163359 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-06Don't include stdint.h directly.Eli Friedman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163354 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-06Explicitly erase the file from disk if something bad happened. ↵Bill Wendling
<rdar://problem/12184899> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163349 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-06The Mips standalone assembler memory instruction support.Jack Carter
This includes sb,sc,sh,sw,lb,lw,lbu,lh,lhu,ll,lw Test case included Contributer: Vladimir Medic git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163346 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-06Release build: guard dump functions with "ifndef NDEBUG"Manman Ren
No functional change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163344 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-06TiedTo is an integer, not a bool.Jakob Stoklund Olesen
Thanks, Andy. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163343 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-06Release build: guard dump functions with "ifndef NDEBUG"Manman Ren
No functional change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163339 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-06Allow overlaps between virtreg and physreg live ranges.Jakob Stoklund Olesen
The RegisterCoalescer understands overlapping live ranges where one register is defined as a copy of the other. With this change, register allocators using LiveRegMatrix can do the same, at least for copies between physical and virtual registers. When a physreg is defined by a copy from a virtreg, allow those live ranges to overlap: %CL<def> = COPY %vreg11:sub_8bit; GR32_ABCD:%vreg11 %vreg13<def,tied1> = SAR32rCL %vreg13<tied0>, %CL<imp-use,kill> We can assign %vreg11 to %ECX, overlapping the live range of %CL. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163336 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-06Handle overlapping regunit intervals in LiveIntervals::addKillFlags().Jakob Stoklund Olesen
We will soon allow virtual register live ranges to overlap regunit live ranges when the physreg is defined as a copy of the virtreg: %EAX = COPY %vreg5 FOO %vreg5 BAR %EAX<kill> There is no real interference since %vreg5 and %EAX have the same value where they overlap. This patch prevents addKillFlags from adding virtreg kill flags to FOO where the assigned physreg is overlapping the virtual register live range. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163335 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-06Clear kill flags while computing live ranges.Jakob Stoklund Olesen
Kill flags are difficult to maintain, and liveness queries are better handled by live intervals. Kill flags are reinserted after register allocation by addKillFlags(). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163334 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-06Dont cast away const needlessly. Found by gcc48 -Wcast-qual.Roman Divacky
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163324 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-06Diagnose invalid alignments on duplicating VLDn instructions.Tim Northover
Patch by Chris Lidbury. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163323 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-06Check for invalid alignment values when decoding VLDn/VSTn (single ln) ↵Tim Northover
instructions. Patch by Chris Lidbury. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163321 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-06BasicAA: Recognize cyclic NoAlias phisArnold Schwaighofer
Enhances basic alias analysis to recognize phis whose first incoming values are NoAlias and whose other incoming values are just the phi node itself through some amount of recursion. Example: With this change basicaa reports that ptr_phi and ptr_phi2 do not alias each other. bb: ptr = ptr2 + 1 loop: ptr_phi = phi [bb, ptr], [loop, ptr_plus_one] ptr2_phi = phi [bb, ptr2], [loop, ptr2_plus_one] ... ptr_plus_one = gep ptr_phi, 1 ptr2_plus_one = gep ptr2_phi, 1 This enables the elimination of one load in code like the following: extern int foo; int test_noalias(int *ptr, int num, int* coeff) { int *ptr2 = ptr; int result = (*ptr++) * (*coeff--); while (num--) { *ptr2++ = *ptr; result += (*coeff--) * (*ptr++); } *ptr = foo; return result; } Part 2/2 of fix for PR13564. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163319 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-06Use correct part of complex operand to encode VST1 alignment.Tim Northover
Patch by Chris Lidbury. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163318 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-06BasicAA: GEPs of NoAlias'ing base ptr with equivalent indices are NoAliasArnold Schwaighofer
If we can show that the base pointers of two GEPs don't alias each other using precise analysis and the indices and base offset are equal then the two GEPs also don't alias each other. This is primarily needed for the follow up patch that analyses NoAlias'ing PHI nodes. Part 1/2 of fix for PR13564. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163317 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-06Disable stack coloring by default in order to resolve the i386 failures.Nadav Rotem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163316 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-06Tablegen: Add OperandWithDefaultOps Operand typeTom Stellard
This Operand type takes a default argument, and is initialized to this value if it does not appear in a patter. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163315 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-06AVX2 optimization.Elena Demikhovsky
Added generation of VPSHUB instruction for <32 x i8> vector shuffle when possible. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163312 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-06Fix a few old-GCC warnings. No functional change.Nadav Rotem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163309 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-06Fix the test by specifying an exact cpu model.Nadav Rotem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163307 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-06Fix self-host; ensure signedness is consistent.James Molloy
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163306 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-06Fix switch_to_lookup_table.ll test from r163302.Hans Wennborg
The lookup tables did not get built in a deterministic order. This makes them get built in the order that the corresponding phi nodes were found. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163305 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-06Improve codegen for BUILD_VECTORs on ARM.James Molloy
If we have a BUILD_VECTOR that is mostly a constant splat, it is often better to splat that constant then insertelement the non-constant lanes instead of insertelementing every lane from an undef base. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163304 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-06Build lookup tables for switches (PR884)Hans Wennborg
This adds a transformation to SimplifyCFG that attemps to turn switch instructions into loads from lookup tables. It works on switches that are only used to initialize one or more phi nodes in a common successor basic block, for example: int f(int x) { switch (x) { case 0: return 5; case 1: return 4; case 2: return -2; case 5: return 7; case 6: return 9; default: return 42; } This speeds up the code by removing the hard-to-predict jump, and reduces code size by removing the code for the jump targets. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163302 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-06Add a new optimization pass: Stack Coloring, that merges disjoint static ↵Nadav Rotem
allocations (allocas). Allocas are known to be disjoint if they are marked by disjoint lifetime markers (@llvm.lifetime.XXX intrinsics). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163299 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-06Optimize codegen for VSETLNi{8,16,32} operating on Q registers. Degenerate ↵James Molloy
to a VSETLN on D registers, instead of an (INSERT_SUBREG (VSETLN (EXTRACT_SUBREG ))) sequence to help the register coalescer. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163298 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-06Remove duplicated helper functionMichael Liao
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163295 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-06Use iPTR instead of i32 for extract_subvector/insert_subvector index in ↵Craig Topper
lowering and patterns. This makes it consistent with the incoming DAG nodes from the DAG builder. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163293 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-06Add patterns for converting stores of subvector_extracts of lower 128-bits ↵Craig Topper
of a 256-bit vector to VMOVAPSmr/VMOVUPSmr. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163292 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-06Revert "Enable MCJIT tests on Darwin."Jim Grosbach
This reverts commit 163278. Works OK on x86_64, but not i386. Will re-enable when that's cleared up. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163290 91177308-0d34-0410-b5e6-96231b3b80d8
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