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2012-02-03Remove getShuffleVPERMILPImmediate function, getShuffleSHUFImmediate ↵Craig Topper
performs the same calculation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149683 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-03Allow command-line overrides of the target triple with the Mach-OCameron Zwarich
disassembler, just like the generic disassembler. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149681 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-03Remove unnecessary qualification on 256-bit vector handling in ↵Craig Topper
LowerBUILD_VECTOR. Condition was already guaranteed by earlier code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149680 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-03Add auto upgrade support for x86 pcmpgt/pcmpeq intrinics removed in r149367.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149678 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-03Do the same fix as r149667, but for the Mach-O disassembler.Cameron Zwarich
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149674 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-03Added TargetPassConfig. The first little step toward configuring codegen passes.Andrew Trick
Allows command line overrides to be centralized in LLVMTargetMachine.cpp. LLVMTargetMachine can intercept common passes and give precedence to command line overrides. Allows adding "internal" target configuration options without touching TargetOptions. Encapsulates the PassManager. Provides a good point to initialize all CodeGen passes so that Pass ID's can be used in APIs. Allows modifying the target configuration hooks without rebuilding the world. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149672 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-03whitespaceAndrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149671 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-03Add a new MachineJumpTableInfo entry type, EK_GPRel64BlockAddress, which isAkira Hatanaka
needed to emit a 64-bit gp-relative relocation entry. Make changes necessary for emitting jump tables which have entries with directive .gpdword. This patch does not implement the parts needed for direct object emission or JIT. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149668 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-03Fix llvm-objdump disassembly for interesting Mach-O binaries, e.g. any MacOSCameron Zwarich
dylib. This regressed with r145408. I will try to make a test case and add it so that this doesn't happen again. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149667 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-03Incorporate suggestions Chad, Jakob and Evan's suggestions on r149957.Lang Hames
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149655 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-03Fix SSAUpdaterImpl's RecordMatchingPHI to record exactly theDan Gohman
PHI nodes which were matched, rather than climbing up the original PHI node's operands to rediscover PHI nodes for recording, since the PHI nodes found that are not necessarily part of the matched set. This fixes rdar://10589171. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149654 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-03Replace the old --with-cxx-* configure options with a single ↵Rafael Espindola
--with-gcc-toolchain that just uses the new toolchain probing logic. This fixes linking with -m32 on 64 bit systems (the /32 dir was not being added to the search). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149651 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-03Narrow test further. Make bot and test happy.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149650 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-03Tidy up. Trailing whitespace.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149649 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-03Restrict InstCombine from converting varargs to or from fixed args.Jim Grosbach
More targetted fix replacing d0e277d272d517ca1cda368267d199f0da7cad95. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149648 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-03Revert "Disable InstCombine unsafe folding bitcasts of calls w/ varargs."Jim Grosbach
This reverts commit d0e277d272d517ca1cda368267d199f0da7cad95. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149647 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-02Require non-NULL register masks.Jakob Stoklund Olesen
It doesn't seem worthwhile to give meaning to a NULL register mask pointer. It complicates all the code using register mask operands. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149646 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-02build/make: Ensure make clean removes the LLVMBuild makefile fragment.Daniel Dunbar
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149643 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-02build/Make: Add missing dependency, LLVMBuild makefile fragment implicitly ↵Daniel Dunbar
depends on Makefile.config. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149642 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-02Add pseudo-registers for pairs, triples, and quads of D registers.Jakob Stoklund Olesen
NEON loads and stores accept single and double spaced pairs, triples, and quads of D registers. This patch adds new register classes to accurately model those constraints: Dn, Dn+1 Dn, Dn+2 ---------------------- DPair DPairSpc DTriple DTripleSpc DQuad DQuadSpc Also extend the existing QQ and QQQQ register classes to contains all Q pairs and quads instead of just the aligned ones. These new register classes will make it possible to accurately model constraints on NEON loads and stores, and we can get rid of all the NEON pseudo-instructions. The late scheduler will be able to accurately model instruction dependencies from the explicit operands. This more than doubles the number of ARM registers, but the backend passes are quite good at handling this. The llc -O0 compile time only regresses by 1.5%. Future work on register mask operands will recover this regression. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149640 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-02Unix line endingsMatt Beaumont-Gay
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149615 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-02BBVectorize: Simplify code, no functionality change.Benjamin Kramer
Also silences warnings about bodyless for loops. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149612 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-02Minor changes from review.Hal Finkel
As suggested by Nick Lewycky, the tree traversal queues have been changed to SmallVectors and the associated loops have been rotated. Also, an 80-col violation was fixed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149607 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-02Move test/CodeGen/Generic/2012-02-01-CoalescerBug.ll to CodeGen/ARM, for ↵NAKAMURA Takumi
now. It requires TARGETS=arm. I cannot reproduce a fixed issue with other targets. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149604 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-02Minor change in signature of the getZeroVector() Elena Demikhovsky
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149601 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-02Optimization for SIGN_EXTEND operation on AVX.Elena Demikhovsky
Special handling was added for v4i32 -> v4i64 and v8i16 -> v8i32 extensions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149600 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-02Unbreak the MSVC build.Francois Pichet
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149599 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-02Re-apply the coalescer fix from r149147. Commit r149597 should have fixed ↵Lang Hames
the llvm-gcc and clang self-host issues. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149598 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-02Set EFLAGS correctly in EmitLoweredSelect on X86.Lang Hames
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149597 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-02Break as soon as the MustMapCurValNos flag is set - no need to reiterate.Lang Hames
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149596 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-02Vectorize long blocks in groups.Hal Finkel
Long basic blocks with many candidate pairs (such as in the SHA implementation in Perl 5.14; thanks to Roman Divacky for the example) used to take an unacceptably-long time to compile. Instead, break long blocks into groups so that no group has too many candidate pairs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149595 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-02PR11868. The previous loop in LiveIntervals::join would sometimes fall over ifLang Hames
more than two adjacent ranges needed to be merged. The new version should be able to handle an arbitrary sequence of adjancent ranges. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149588 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-02Set the correct stack pointer register.Akira Hatanaka
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149585 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-02Expand EHSELECTION and EHSELECTION nodes. Set the correct exception pointer andAkira Hatanaka
selector registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149584 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-02Add DWARF numbers of 64-bit registers.Akira Hatanaka
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149583 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-02Regen one last time.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149576 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-02autoconf: fix build/src dir confusionDylan Noblesmith
This was the cause of the silent failure to generate clang's config.h. My bad. Fix on r149563 / r149568. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149574 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-02Regenerate again.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149569 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-02autoconf: restore old clang-srcdir behaviorDylan Noblesmith
Keep the string empty when unspecified. Undoes part of r149563. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149568 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-02Regenerate configure.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149567 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-02autoconf: honor --with-clang-srcdirDylan Noblesmith
configure was silently failing to produce anything in the case where clang wasn't at tools/clang/, resulting in compilation errors much later in the build when config.h didn't exist. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149563 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-01TypoPete Cooper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149562 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-01Fix the cmake buildRafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149561 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-01Instruction scheduling itinerary for Intel Atom.Andrew Trick
Adds an instruction itinerary to all x86 instructions, giving each a default latency of 1, using the InstrItinClass IIC_DEFAULT. Sets specific latencies for Atom for the instructions in files X86InstrCMovSetCC.td, X86InstrArithmetic.td, X86InstrControl.td, and X86InstrShiftRotate.td. The Atom latencies for the remainder of the x86 instructions will be set in subsequent patches. Adds a test to verify that the scheduler is working. Also changes the scheduling preference to "Hybrid" for i386 Atom, while leaving x86_64 as ILP. Patch by Preston Gurd! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149558 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-01Move ARM subreg index compositions to the SubRegIndex itself.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149557 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-01Specify SubRegIndex components on the index itself.Jakob Stoklund Olesen
It is simpler to define a composite index directly: def ssub_2 : SubRegIndex<[dsub_1, ssub_0]>; def ssub_3 : SubRegIndex<[dsub_1, ssub_1]>; Than specifying the composite indices on each register: CompositeIndices = [(ssub_2 dsub_1, ssub_0), (ssub_3 dsub_1, ssub_1)] in ... This also makes it clear that SubRegIndex composition is supposed to be unique. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149556 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-01fix cmakeAndrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149553 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-01Fix a bug in the TopoOrderRC comparison function.Jakob Stoklund Olesen
The final tie breaker comparison also needs to return +/-1, or 0. This is not a less() function. This could cause otherwise identical super-classes to be ordered unstably, depending on what the system qsort routine does with a bad compare function. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149549 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-01Avoid creating an extract element to an illegal type after LegalizeTypes has ↵Mon P Wang
run. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149548 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-01VLIW specific scheduler framework that utilizes deterministic finite ↵Andrew Trick
automaton (DFA). This new scheduler plugs into the existing selection DAG scheduling framework. It is a top-down critical path scheduler that tracks register pressure and uses a DFA for pipeline modeling. Patch by Sergei Larin! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149547 91177308-0d34-0410-b5e6-96231b3b80d8
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