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2010-10-27Give a name to nameless argument.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117468 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27Tests for NEON encoding of vcls, vclz, and vcnt.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117466 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27Tests for NEON encoding of vneg and vqneg.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117463 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27Produce an error for an invalid use of .symver.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117462 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27The new LDR* instruction patterns should handle the necessary encoding ofJim Grosbach
operands in the TableGen'erated bits, so we don't need to do the additional magic explicitly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117461 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27Tests for NEON encoding of vabs and vqabs.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117460 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27Add correct NEON encodings for vsli and vsri.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117459 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27Add correct NEON encodings for vsra and vrsra.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117458 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27The immediate operands of an LDRi12 instruction doesn't need the addrmode2Jim Grosbach
encoding tricks. Handle the 'imm doesn't fit in the insn' case. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117454 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27Formatting.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117453 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27Symbols defined as the difference of other two end up in the ABS section.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117451 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27Add support for the .symver directive. This is really ugly, but most of it isRafael Espindola
contained in the ELF object writer. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117448 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27Move more logic to isInSymtab and simplify.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117447 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-2780-col violation.Mikhail Glushenkov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117443 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27Remove try/catch(...) from Win32/Signals.inc.Mikhail Glushenkov
catch(...) is used in Win32/Signals.inc for catching Win32 structured exceptions, but according to [1], this is wrong. We can't simply change try/catch to __try/__finally, since this syntax is not supported by MinGW. We can use __try/__finally on MSVC and __try1/__except1 macros on MinGW [2], but I think that that solution obfuscates the code too much. The use of try/catch(...) in Signals.inc makes it impossible to link MinGW-compiled libSystem with llvm-gcc compiled executables. I propose that we just remove try/catch(...) from Signals.inc, since the meaning of the code won't change. [1] http://members.cox.net/doug_web/eh.htm [2] http://article.gmane.org/gmane.comp.compilers.llvm.cvs/81315 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117442 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27It is confusing to call a random-access iterator 'InputIterator'.Mikhail Glushenkov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117441 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27Trailing whitespace.Mikhail Glushenkov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117440 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27Yet another tweak to X86 instructions to add ud2a as an alias to ud2Kevin Enderby
(still to add ud2b). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117435 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27Another tweak to X86 instructions to add the missing flex instruction (withoutKevin Enderby
the wait prefix). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117434 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27Tweaks to X86 instructions to allow the 'w' suffix in places it makesKevin Enderby
sense, when the instruction takes the 16-bit ax register or m16 memory location. These changes to llvm-mc matches what the darwin assembler allows for these instructions. Done differently than in r117031 that caused a valgrind error which was later reverted. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117433 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27LDRi12 machine instructions handle negative offset operands normally (simpleJim Grosbach
integer values), not with the addrmode2 encoding. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117429 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27Random cleanups and format changes.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117428 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27Added some aliases to the fcomip and fucompi Intel instructions. So that llvm-mcKevin Enderby
will accept versions that the darwin assembler allows. Forms ending in "pi" and forms without all the operands. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117427 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27Handle critical loop predecessors by making both inside and outside registersJakob Stoklund Olesen
live out. This doesn't prevent us from inserting a loop preheader later on, if that is better. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117424 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27Compute critical loop predecessors in the same way as critical loop exits.Jakob Stoklund Olesen
Critical edges going into a loop are not as bad as critical exits. We can handle them by splitting the critical edge, or by having both inside and outside registers live out of the predecessor. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117423 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27Physical registers trivially have multiple connected components all the time.Jakob Stoklund Olesen
Only virtuals should be requires to be connected. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117422 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27One more spot where the new arm mode LDR instruction representationJim Grosbach
doesn't need the additional addrmode2 register operand. Missed it the first time around. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117421 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27Adding disassembler to the MicroBlaze backend.Wesley Peck
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117420 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27Split ARM::LDRB into LDRBi12 and LDRBrs. Adjust accordingly. Continuing onJim Grosbach
rdar://8477752. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117419 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26Since I parameterized this bit, I should probably actually use said parameter.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117418 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26Enable clang autocompletion by default.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117415 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26Use a MemIntrinsicSDNode for ISD::PREFETCH, which touchesDale Johannesen
memory, so a MachineMemOperand is useful (not propagated into the MachineInstr yet). No functional change except for dump output. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117413 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26Remove the vector of live vregs. I thought we would need to trackAndrew Trick
them, but hopefully we won't. And this is not the right data structure to do it anyway. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117412 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26Add correct NEON encodings for vqshl, vqshrn, vqshrun, vqrshl, vqshrn, and ↵Owen Anderson
vqrshrun. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117411 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26First part of refactoring ARM addrmode2 (load/store) instructions to be moreJim Grosbach
explicit about the operands. Split out the different variants into separate instructions. This gives us the ability to, among other things, assign different scheduling itineraries to the variants. rdar://8477752. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117409 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26After splitting, compute connected components of all new registers, not just forJakob Stoklund Olesen
the remainder register. Example: bb0: x = 1 bb1: use(x) ... x = 2 jump bb1 When x is isolated in bb1, the inner part breaks into two components, x1 and x2: bb0: x0 = 1 bb1: x1 = x0 use(x1) ... x2 = 2 x0 = x2 jump bb1 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117408 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26Verify that live intervals are connected. If there are multiple connectedJakob Stoklund Olesen
components, each should get its own virtual register. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117407 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26Call RenumberValues for all new registers created during splitting. This isJakob Stoklund Olesen
necessary to get correct hasPHIKill flags. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117406 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26Preserve PHIDef bits in cloned values during splitting.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117405 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26Assign source ordering to nodes created for StoreInst.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117404 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26Correct NEON encodings for vshrn, vrshl, vrshr, vrshrn.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117402 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26FileCheck'izeJim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117401 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26Add tests for NEON encoding of vshll.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117399 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26Simplify classes for shift instructions, which are never commutable.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117398 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26Tests for NEON encoding of vshr.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117396 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26Provide correct NEON encodings for vshl, register and immediate forms.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117394 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26Teach MachineBasicBlock::print() to annotate instructions and blocks withJakob Stoklund Olesen
SlotIndexes when available. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117392 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26Remmeber to print full live interval on verification error.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117391 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26Add support for .ident.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117389 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26Grammar.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117388 91177308-0d34-0410-b5e6-96231b3b80d8
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